339
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1 /*
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2 instab.c
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3 Copyright © 2008 William Astle
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4
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5 This file is part of LWASM.
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6
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7 LWASM is free software: you can redistribute it and/or modify it under the
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8 terms of the GNU General Public License as published by the Free Software
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9 Foundation, either version 3 of the License, or (at your option) any later
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10 version.
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11
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12 This program is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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15 more details.
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16
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17 You should have received a copy of the GNU General Public License along with
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18 this program. If not, see <http://www.gnu.org/licenses/>.
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19
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20
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21 Contains the instruction table for assembling code
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22 */
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23 #include <config.h>
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24
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25 #include <stdlib.h>
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26 #define __instab_c_seen__
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27 #include "instab.h"
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28
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29 extern OPFUNC(insn_inh);
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30 extern OPFUNC(insn_gen8);
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31 extern OPFUNC(insn_gen16);
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32 extern OPFUNC(insn_gen32);
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33 extern OPFUNC(insn_gen0);
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34 extern OPFUNC(insn_rtor);
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35 extern OPFUNC(insn_imm8);
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36 extern OPFUNC(insn_rel8);
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37 extern OPFUNC(insn_rel16);
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38 extern OPFUNC(insn_rlist);
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39 extern OPFUNC(insn_bitbit);
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40 extern OPFUNC(insn_logicmem);
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41 extern OPFUNC(insn_tfm);
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42 extern OPFUNC(insn_tfmrtor);
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43 extern OPFUNC(insn_indexed);
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44
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45 extern OPFUNC(pseudo_org);
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46 extern OPFUNC(pseudo_equ);
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47 extern OPFUNC(pseudo_rmb);
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48 extern OPFUNC(pseudo_rmd);
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49 extern OPFUNC(pseudo_rmq);
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50 extern OPFUNC(pseudo_zmb);
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51 extern OPFUNC(pseudo_zmd);
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52 extern OPFUNC(pseudo_zmq);
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53 extern OPFUNC(pseudo_include);
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54 extern OPFUNC(pseudo_end);
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55 extern OPFUNC(pseudo_align);
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56 extern OPFUNC(pseudo_error);
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57 extern OPFUNC(pseudo_fcc);
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58 extern OPFUNC(pseudo_fcs);
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59 extern OPFUNC(pseudo_fcn);
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60 extern OPFUNC(pseudo_fcb);
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61 extern OPFUNC(pseudo_fdb);
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62 extern OPFUNC(pseudo_fqb);
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63 extern OPFUNC(pseudo_ifne);
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64 extern OPFUNC(pseudo_ifeq);
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65 extern OPFUNC(pseudo_ifgt);
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66 extern OPFUNC(pseudo_ifge);
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67 extern OPFUNC(pseudo_iflt);
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68 extern OPFUNC(pseudo_ifle);
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69 extern OPFUNC(pseudo_ifp1);
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70 extern OPFUNC(pseudo_ifp2);
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71 extern OPFUNC(pseudo_else);
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72 extern OPFUNC(pseudo_endc);
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73 extern OPFUNC(pseudo_macro);
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74 extern OPFUNC(pseudo_endm);
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75 extern OPFUNC(pseudo_setdp);
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76 extern OPFUNC(pseudo_set);
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77 extern OPFUNC(pseudo_section);
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78 extern OPFUNC(pseudo_endsection);
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79 extern OPFUNC(pseudo_pragma);
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80 extern OPFUNC(pseudo_starpragma);
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81 extern OPFUNC(pseudo_extern);
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82 extern OPFUNC(pseudo_export);
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83 extern OPFUNC(pseudo_ifdef);
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84 extern OPFUNC(pseudo_ifndef);
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85 extern OPFUNC(pseudo_noop);
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86 extern OPFUNC(pseudo_includebin);
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87
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88 extern OPFUNC(pseudo_os9);
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89 extern OPFUNC(pseudo_mod);
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90 extern OPFUNC(pseudo_emod);
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91
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92 instab_t instab[] =
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93 {
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94 { "abx", { 0x3a, -0x1, -0x1, -0x1 }, insn_inh },
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95 { "adca", { 0x99, 0xa9, 0xb9, 0x89 }, insn_gen8 },
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96 { "adcb", { 0xd9, 0xe9, 0xf9, 0xc9 }, insn_gen8 },
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97 { "adcd", { 0x1099, 0x10a9, 0x10b9, 0x1089 }, insn_gen16 , 0, 0, 0, 1},
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98 { "adcr", { 0x1031, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
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99 { "adda", { 0x9b, 0xab, 0xbb, 0x8b }, insn_gen8 },
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100 { "addb", { 0xdb, 0xeb, 0xfb, 0xcb }, insn_gen8 },
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101 { "addd", { 0xd3, 0xe3, 0xf3, 0xc3 }, insn_gen16 },
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102 { "adde", { 0x119b, 0x11ab, 0x11bb, 0x118b }, insn_gen8, 0, 0, 0, 1 },
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103 { "addf", { 0x11db, 0x11eb, 0x11fb, 0x11cb }, insn_gen8, 0, 0, 0, 1 },
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104 { "addr", { 0x1030, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
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105 { "addw", { 0x109b, 0x10ab, 0x10bb, 0x108b }, insn_gen16, 0, 0, 0, 1 },
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106 { "aim", { 0x02, 0x62, 0x72, -0x1 }, insn_logicmem, 0, 0, 0, 1 },
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107 { "anda", { 0x94, 0xa4, 0xb4, 0x84 }, insn_gen8 },
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108 { "andb", { 0xd4, 0xe4, 0xf4, 0xc4 }, insn_gen8 },
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109 { "andcc", { 0x1c, -0x1, -0x1, 0x1c }, insn_imm8 },
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110 { "andd", { 0x1094, 0x10a4, 0x10b4, 0x1084 }, insn_gen16, 0, 0, 0, 1 },
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111 { "andr", { 0x1034, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
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112 { "asl", { 0x08, 0x68, 0x78, -0x1 }, insn_gen0 },
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113 { "asla", { 0x48, -0x1, -0x1, -0x1 }, insn_inh },
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114 { "aslb", { 0x58, -0x1, -0x1, -0x1 }, insn_inh },
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115 { "asld", { 0x1048, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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116 { "asr", { 0x07, 0x67, 0x77, -0x1 }, insn_gen0 },
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117 { "asra", { 0x47, -0x1, -0x1, -0x1 }, insn_inh },
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118 { "asrb", { 0x57, -0x1, -0x1, -0x1 }, insn_inh },
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119 { "asrd", { 0x1047, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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120
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121 { "band", { 0x1130, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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122 { "bcc", { 0x24, -0x1, -0x1, -0x1 }, insn_rel8 },
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123 { "bcs", { 0x25, -0x1, -0x1, -0x1 }, insn_rel8 },
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124 { "beor", { 0x1134, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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125 { "beq", { 0x27, -0x1, -0x1, -0x1 }, insn_rel8 },
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126 { "bge", { 0x2c, -0x1, -0x1, -0x1 }, insn_rel8 },
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127 { "bgt", { 0x2e, -0x1, -0x1, -0x1 }, insn_rel8 },
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128 { "bhi", { 0x22, -0x1, -0x1, -0x1 }, insn_rel8 },
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129 { "bhs", { 0x24, -0x1, -0x1, -0x1 }, insn_rel8 },
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130 { "biand", { 0x1131, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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131 { "bieor", { 0x1135, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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132 { "bior", { 0x1133, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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133 { "bita", { 0x95, 0xa5, 0xb5, 0x85 }, insn_gen8 },
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134 { "bitb", { 0xd5, 0xe5, 0xf5, 0xc5 }, insn_gen8 },
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135 { "bitd", { 0x1095, 0x10a5, 0x10b5, 0x1085 }, insn_gen16, 0, 0, 0, 1 },
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136 { "bitmd", { 0x113c, -0x1, -0x1, 0x113c }, insn_imm8, 0, 0, 0, 1 },
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137 { "ble", { 0x2f, -0x1, -0x1, -0x1 }, insn_rel8 },
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138 { "blo", { 0x25, -0x1, -0x1, -0x1 }, insn_rel8 },
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139 { "bls", { 0x23, -0x1, -0x1, -0x1 }, insn_rel8 },
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140 { "blt", { 0x2d, -0x1, -0x1, -0x1 }, insn_rel8 },
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141 { "bmi", { 0x2b, -0x1, -0x1, -0x1 }, insn_rel8 },
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142 { "bne", { 0x26, -0x1, -0x1, -0x1 }, insn_rel8 },
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143 { "bor", { 0x1132, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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144 { "bpl", { 0x2a, -0x1, -0x1, -0x1 }, insn_rel8 },
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145 { "bra", { 0x20, -0x1, -0x1, -0x1 }, insn_rel8 },
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146 { "brn", { 0x21, -0x1, -0x1, -0x1 }, insn_rel8 },
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147 { "bsr", { 0x8d, -0x1, -0x1, -0x1 }, insn_rel8 },
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148 { "bvc", { 0x28, -0x1, -0x1, -0x1 }, insn_rel8 },
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149 { "bvs", { 0x29, -0x1, -0x1, -0x1 }, insn_rel8 },
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150
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151 { "clr", { 0x0f, 0x6f, 0x7f, -0x1 }, insn_gen0 },
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152 { "clra", { 0x4f, -0x1, -0x1, -0x1 }, insn_inh },
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153 { "clrb", { 0x5f, -0x1, -0x1, -0x1 }, insn_inh },
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154 { "clrd", { 0x104f, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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155 { "clre", { 0x114f, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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156 { "clrf", { 0x115f, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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157 { "clrw", { 0x105f, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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158 { "cmpa", { 0x91, 0xa1, 0xb1, 0x81 }, insn_gen8 },
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159 { "cmpb", { 0xd1, 0xe1, 0xf1, 0xc1 }, insn_gen8 },
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160 { "cmpd", { 0x1093, 0x10a3, 0x10b3, 0x1083 }, insn_gen16 },
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161 { "cmpe", { 0x1191, 0x11a1, 0x11b1, 0x1181 }, insn_gen8, 0, 0, 0, 1 },
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162 { "cmpf", { 0x11d1, 0x11e1, 0x11f1, 0x11c1 }, insn_gen8, 0, 0, 0, 1 },
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163 { "cmpr", { 0x1037, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
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164 { "cmps", { 0x119c, 0x11ac, 0x11bc, 0x118c }, insn_gen16 },
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165 { "cmpu", { 0x1193, 0x11a3, 0x11b3, 0x1183 }, insn_gen16 },
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166 { "cmpw", { 0x1091, 0x10a1, 0x10b1, 0x1081 }, insn_gen16, 0, 0, 0, 1 },
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167 { "cmpx", { 0x9c, 0xac, 0xbc, 0x8c }, insn_gen16 },
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168 { "cmpy", { 0x109c, 0x10ac, 0x10bc, 0x108c }, insn_gen16 },
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169 { "com", { 0x03, 0x63, 0x73, -0x1 }, insn_gen0 },
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170 { "coma", { 0x43, -0x1, -0x1, -0x1 }, insn_inh },
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171 { "comb", { 0x53, -0x1, -0x1, -0x1 }, insn_inh },
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172 { "comd", { 0x1043, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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173 { "come", { 0x1143, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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174 { "comf", { 0x1153, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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175 { "comw", { 0x1053, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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176 { "cwai", { 0x3c, -0x1, -0x1, -0x1 }, insn_imm8 },
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177
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178 { "daa", { 0x19, -0x1, -0x1, -0x1 }, insn_inh },
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179 { "dec", { 0x0a, 0x6a, 0x7a, -0x1 }, insn_gen0 },
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180 { "deca", { 0x4a, -0x1, -0x1, -0x1 }, insn_inh },
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181 { "decb", { 0x5a, -0x1, -0x1, -0x1 }, insn_inh },
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182 { "decd", { 0x104a, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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183 { "dece", { 0x114a, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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184 { "decf", { 0x115a, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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185 { "decw", { 0x105a, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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186 { "divd", { 0x118d, 0x119d, 0x11ad, 0x11bd }, insn_gen8, 0, 0, 0, 1 },
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187 { "divq", { 0x118e, 0x119e, 0x11ae, 0x11be }, insn_gen16, 0, 0, 0, 1 },
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188
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189 { "eim", { 0x05, 0x65, 0x75, -0x1 }, insn_logicmem, 0, 0, 0, 1 },
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190 { "eora", { 0x98, 0xa8, 0xb8, 0x88 }, insn_gen8 },
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191 { "eorb", { 0xd8, 0xe9, 0xf9, 0xc8 }, insn_gen8 },
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192 { "eord", { 0x1098, 0x10a8, 0x10b8, 0x1088 }, insn_gen16, 0, 0, 0, 1 },
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193 { "eorr", { 0x1036, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
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194 { "exg", { 0x1e, -0x1, -0x1, -0x1 }, insn_rtor },
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195
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196 { "inc", { 0x0c, 0x6c, 0x7c, -0x1 }, insn_gen0 },
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197 { "inca", { 0x4c, -0x1, -0x1, -0x1 }, insn_inh },
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198 { "incb", { 0x5c, -0x1, -0x1, -0x1 }, insn_inh },
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199 { "incd", { 0x104c, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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200 { "ince", { 0x114c, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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201 { "incf", { 0x115c, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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202 { "incw", { 0x105c, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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203
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204 { "jmp", { 0x0e, 0x6e, 0x7e, -0x1 }, insn_gen0 },
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205 { "jsr", { 0x9d, 0xad, 0xbd, -0x1 }, insn_gen0 },
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206
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207 { "lbcc", { 0x1024, -0x1, -0x1, -0x1 }, insn_rel16 },
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208 { "lbcs", { 0x1025, -0x1, -0x1, -0x1 }, insn_rel16 },
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209 { "lbeq", { 0x1027, -0x1, -0x1, -0x1 }, insn_rel16 },
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210 { "lbge", { 0x102c, -0x1, -0x1, -0x1 }, insn_rel16 },
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211 { "lbgt", { 0x102e, -0x1, -0x1, -0x1 }, insn_rel16 },
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212 { "lbhi", { 0x1022, -0x1, -0x1, -0x1 }, insn_rel16 },
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213 { "lbhs", { 0x1024, -0x1, -0x1, -0x1 }, insn_rel16 },
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214 { "lble", { 0x102f, -0x1, -0x1, -0x1 }, insn_rel16 },
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215 { "lblo", { 0x1025, -0x1, -0x1, -0x1 }, insn_rel16 },
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216 { "lbls", { 0x1023, -0x1, -0x1, -0x1 }, insn_rel16 },
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217 { "lblt", { 0x102d, -0x1, -0x1, -0x1 }, insn_rel16 },
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218 { "lbmi", { 0x102b, -0x1, -0x1, -0x1 }, insn_rel16 },
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219 { "lbne", { 0x1026, -0x1, -0x1, -0x1 }, insn_rel16 },
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220 { "lbpl", { 0x102a, -0x1, -0x1, -0x1 }, insn_rel16 },
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221 { "lbra", { 0x16, -0x1, -0x1, -0x1 }, insn_rel16 },
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222 { "lbrn", { 0x1021, -0x1, -0x1, -0x1 }, insn_rel16 },
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223 { "lbsr", { 0x17, -0x1, -0x1, -0x1 }, insn_rel16 },
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224 { "lbvc", { 0x1028, -0x1, -0x1, -0x1 }, insn_rel16 },
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225 { "lbvs", { 0x1029, -0x1, -0x1, -0x1 }, insn_rel16 },
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226 { "lda", { 0x96, 0xa6, 0xb6, 0x86 }, insn_gen8 },
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227 { "ldb", { 0xd6, 0xe6, 0xf6, 0xc6 }, insn_gen8 },
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228 { "ldbt", { 0x1136, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
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229 { "ldd", { 0xdc, 0xec, 0xfc, 0xcc }, insn_gen16 },
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230 { "lde", { 0x1196, 0x11a6, 0x11b6, 0x1186 }, insn_gen8, 0, 0, 0, 1 },
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231 { "ldf", { 0x11d6, 0x11e6, 0x11f6, 0x11c6 }, insn_gen8, 0, 0, 0, 1 },
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232 { "ldq", { 0x10dc, 0x10ec, 0x10fc, 0xcd }, insn_gen32, 0, 0, 0, 1 },
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233 { "lds", { 0x10de, 0x10ee, 0x10fe, 0x10ce }, insn_gen16 },
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234 { "ldu", { 0xde, 0xee, 0xfe, 0xce }, insn_gen16 },
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235 { "ldw", { 0x1096, 0x10a6, 0x10b6, 0x1086 }, insn_gen16, 0, 0, 0, 1 },
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236 { "ldx", { 0x9e, 0xae, 0xbe, 0x8e }, insn_gen16 },
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237 { "ldy", { 0x109e, 0x10ae, 0x10be, 0x108e }, insn_gen16 },
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238 { "ldmd", { 0x113d, -0x1, -0x1, 0x113d }, insn_imm8, 0, 0, 0, 1 },
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239 { "leas", { 0x32, -0x1, -0x1, -0x1 }, insn_indexed },
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240 { "leau", { 0x33, -0x1, -0x1, -0x1 }, insn_indexed },
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241 { "leax", { 0x30, -0x1, -0x1, -0x1 }, insn_indexed },
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242 { "leay", { 0x31, -0x1, -0x1, -0x1 }, insn_indexed },
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243 { "lsl", { 0x08, 0x68, 0x78, -0x1 }, insn_gen0 },
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244 { "lsla", { 0x48, -0x1, -0x1, -0x1 }, insn_inh },
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245 { "lslb", { 0x58, -0x1, -0x1, -0x1 }, insn_inh },
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246 { "lsld", { 0x1048, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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247 { "lsr", { 0x04, 0x64, 0x74, -0x1 }, insn_gen0 },
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248 { "lsra", { 0x44, -0x1, -0x1, -0x1 }, insn_inh },
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249 { "lsrb", { 0x54, -0x1, -0x1, -0x1 }, insn_inh },
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250 { "lsrd", { 0x1044, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
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251 { "lsrw", { 0x1054, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
252
|
|
253 { "mul", { 0x3d, -0x1, -0x1, -0x1 }, insn_inh },
|
|
254 { "muld", { 0x118f, 0x119f, 0x11af, 0x11bf }, insn_gen16, 0, 0, 0, 1 },
|
|
255
|
|
256 { "neg", { 0x00, 0x60, 0x70, -0x1 }, insn_gen0 },
|
|
257 { "nega", { 0x40, -0x1, -0x1, -0x1 }, insn_inh },
|
|
258 { "negb", { 0x50, -0x1, -0x1, -0x1 }, insn_inh },
|
|
259 { "negd", { 0x1040, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
260 { "nop", { 0x12, -0x1, -0x1, -0x1 }, insn_inh },
|
|
261
|
|
262 { "oim", { 0x01, 0x61, 0x71, -0x1 }, insn_logicmem, 0, 0, 0, 1 },
|
|
263 { "ora", { 0x9a, 0xaa, 0xba, 0x8a }, insn_gen8 },
|
|
264 { "orb", { 0xda, 0xea, 0xfa, 0xca }, insn_gen8 },
|
|
265 { "orcc", { 0x1a, -0x1, -0x1, 0x1a }, insn_imm8 },
|
|
266 { "ord", { 0x109a, 0x10aa, 0x10ba, 0x108a }, insn_gen16, 0, 0, 0, 1 },
|
|
267 { "orr", { 0x1035, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
|
|
268
|
|
269 { "pshs", { 0x34, -0x1, -0x1, -0x1 }, insn_rlist },
|
|
270 { "pshsw", { 0x1038, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
271 { "pshu", { 0x36, -0x1, -0x1, -0x1 }, insn_rlist },
|
|
272 { "pshuw", { 0x103a, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
273 { "puls", { 0x35, -0x1, -0x1, -0x1 }, insn_rlist },
|
|
274 { "pulsw", { 0x1039, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
275 { "pulu", { 0x37, -0x1, -0x1, -0x1 }, insn_rlist },
|
|
276 { "puluw", { 0x103b, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
277
|
|
278 { "rol", { 0x09, 0x69, 0x79, -0x1 }, insn_gen0 },
|
|
279 { "rola", { 0x49, -0x1, -0x1, -0x1 }, insn_inh },
|
|
280 { "rolb", { 0x59, -0x1, -0x1, -0x1 }, insn_inh },
|
|
281 { "rold", { 0x1049, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
282 { "rolw", { 0x1059, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
283 { "ror", { 0x06, 0x66, 0x76, -0x1 }, insn_gen0 },
|
|
284 { "rora", { 0x46, -0x1, -0x1, -0x1 }, insn_inh },
|
|
285 { "rorb", { 0x56, -0x1, -0x1, -0x1 }, insn_inh },
|
|
286 { "rord", { 0x1046, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
287 { "rorw", { 0x1056, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
288 { "rti", { 0x3b, -0x1, -0x1, -0x1 }, insn_inh },
|
|
289 { "rts", { 0x39, -0x1, -0x1, -0x1 }, insn_inh },
|
|
290
|
|
291 { "sbca", { 0x92, 0xa2, 0xb2, 0x82 }, insn_gen8 },
|
|
292 { "sbcb", { 0xd2, 0xe2, 0xf2, 0xc2 }, insn_gen8 },
|
|
293 { "sbcd", { 0x1092, 0x10a2, 0x10b2, 0x1082 }, insn_gen16, 0, 0, 0, 1 },
|
|
294 { "sbcr", { 0x1033, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
|
|
295 { "sex", { 0x1d, -0x1, -0x1, -0x1 }, insn_inh },
|
|
296 { "sexw", { 0x14, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
297 { "sta", { 0x97, 0xa7, 0xb7, -0x1 }, insn_gen0 },
|
|
298 { "stb", { 0xd7, 0xe7, 0xf7, -0x1 }, insn_gen0 },
|
|
299 { "stbt", { 0x1137, -0x1, -0x1, -0x1 }, insn_bitbit, 0, 0, 0, 1 },
|
|
300 { "std", { 0xdd, 0xed, 0xfd, -0x1 }, insn_gen0 },
|
|
301 { "ste", { 0x1197, 0x11a7, 0x11b7, -0x1 }, insn_gen0, 0, 0, 0, 1 },
|
|
302 { "stf", { 0x11d7, 0x11e7, 0x11f7, -0x1 }, insn_gen0, 0, 0, 0, 1 },
|
|
303 { "stq", { 0x10dd, 0x10ed, 0x10fd, -0x1 }, insn_gen0, 0, 0, 0, 1 },
|
|
304 { "sts", { 0x10df, 0x10ef, 0x10ff, -0x1 }, insn_gen0 },
|
|
305 { "stu", { 0xdf, 0xef, 0xff, -0x1 }, insn_gen0 },
|
|
306 { "stw", { 0x1097, 0x10a7, 0x10b7, -0x1 }, insn_gen0, 0, 0, 0, 1 },
|
|
307 { "stx", { 0x9f, 0xaf, 0xbf, -0x1 }, insn_gen0 },
|
|
308 { "sty", { 0x109f, 0x10af, 0x10bf, -0x1 }, insn_gen0 },
|
|
309 { "suba", { 0x90, 0xa0, 0xb0, 0x80 }, insn_gen8 },
|
|
310 { "subb", { 0xd0, 0xe0, 0xf0, 0xc0 }, insn_gen8 },
|
|
311 { "subd", { 0x93, 0xa3, 0xb3, 0x83 }, insn_gen16 },
|
|
312 { "sube", { 0x1190, 0x11a0, 0x11b0, 0x1180 }, insn_gen8, 0, 0, 0, 1 },
|
|
313 { "subf", { 0x11d0, 0x11e0, 0x11f0, 0x11c0 }, insn_gen8, 0, 0, 0, 1 },
|
|
314 { "subr", { 0x1032, -0x1, -0x1, -0x1 }, insn_rtor, 0, 0, 0, 1 },
|
|
315 { "subw", { 0x1090, 0x10a0, 0x1090, 0x1080 }, insn_gen8, 0, 0, 0, 1 },
|
|
316 { "swi", { 0x3f, -0x1, -0x1, -0x1 }, insn_inh },
|
|
317 { "swi2", { 0x103f, -0x1, -0x1, -0x1 }, insn_inh },
|
|
318 { "swi3", { 0x113f, -0x1, -0x1, -0x1 }, insn_inh },
|
|
319 { "sync", { 0x13, -0x1, -0x1, -0x1 }, insn_inh },
|
|
320
|
|
321 // note: r+,r+ r-,r- r+,r r,r+
|
|
322 { "tfm", { 0x1138, 0x1139, 0x113a, 0x113b }, insn_tfm, 0, 0, 0, 1 },
|
|
323
|
|
324 // compatibility opcodes for tfm in other assemblers
|
|
325 { "copy", { 0x1138, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
326 { "copy+", { 0x1138, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
327 { "tfrp", { 0x1138, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
328
|
|
329 { "copy-", { 0x1139, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
330 { "tfrm", { 0x1139, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
331
|
|
332 { "imp", { 0x113a, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
333 { "implode",{ 0x113a, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
334 { "tfrs", { 0x113a, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
335
|
|
336 { "exp", { 0x113b, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
337 { "expand", { 0x113b, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
338 { "tfrr", { 0x113b, -1, -1, -1}, insn_tfmrtor, 0, 0, 0, 1 },
|
|
339
|
|
340 { "tfr", { 0x1f, -0x1, -0x1, -0x1 }, insn_rtor },
|
|
341 { "tim", { 0x0b, 0x6b, 0x7b, -0x1 }, insn_logicmem, 0, 0, 0, 1 },
|
|
342 { "tst", { 0x0d, 0x6d, 0x7d, -0x1 }, insn_gen0 },
|
|
343 { "tsta", { 0x4d, -0x1, -0x1, -0x1 }, insn_inh },
|
|
344 { "tstb", { 0x5d, -0x1, -0x1, -0x1 }, insn_inh },
|
|
345 { "tstd", { 0x104d, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
346 { "tste", { 0x114d, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
347 { "tstf", { 0x115d, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
348 { "tstw", { 0x105d, -0x1, -0x1, -0x1 }, insn_inh, 0, 0, 0, 1 },
|
|
349
|
|
350 { "org", { -1, -1, -1, -1 }, pseudo_org },
|
|
351
|
|
352 { "equ", { -1, -1, -1, -1 }, pseudo_equ, 0, 0, 1 },
|
|
353 { "=", { -1, -1, -1, -1 }, pseudo_equ, 0, 0, 1 },
|
|
354 { "extern", { -1, -1, -1, -1 }, pseudo_extern, 0, 0, 1 },
|
|
355 { "external", { -1, -1, -1, -1 }, pseudo_extern, 0, 0, 1 },
|
|
356 { "import", { -1, -1, -1, -1 }, pseudo_extern, 0, 0, 1 },
|
|
357 { "export", { -1, -1, -1, -1 }, pseudo_export, 0, 0, 1 },
|
|
358
|
|
359
|
|
360 { "rmb", { -1, -1, -1, -1 }, pseudo_rmb },
|
|
361 { "rmd", { -1, -1, -1, -1 }, pseudo_rmd },
|
|
362 { "rmq", { -1, -1, -1, -1 }, pseudo_rmq },
|
|
363
|
|
364 { "zmb", { -1, -1, -1, -1 }, pseudo_zmb },
|
|
365 { "zmd", { -1, -1, -1, -1 }, pseudo_zmd },
|
|
366 { "zmq", { -1, -1, -1, -1 }, pseudo_zmq },
|
|
367
|
|
368 { "fcc", { -1, -1, -1, -1 }, pseudo_fcc },
|
|
369 { "fcn", { -1, -1, -1, -1 }, pseudo_fcn },
|
|
370 { "fcs", { -1, -1, -1, -1 }, pseudo_fcs },
|
|
371
|
|
372 { "fcb", { -1, -1, -1, -1 }, pseudo_fcb },
|
|
373 { "fdb", { -1, -1, -1, -1 }, pseudo_fdb },
|
|
374 { "fqb", { -1, -1, -1, -1 }, pseudo_fqb },
|
|
375
|
|
376 { "end", { -1, -1, -1, -1 }, pseudo_end },
|
|
377
|
|
378 { "includebin", { -1, -1, -1, -1}, pseudo_includebin },
|
|
379 { "include", { -1, -1, -1, -1 }, pseudo_include },
|
|
380 { "use", { -1, -1, -1, -1 }, pseudo_include },
|
|
381
|
|
382 { "align", { -1, -1, -1, -1 }, pseudo_align },
|
|
383
|
|
384 { "error", { -1, -1, -1, -1}, pseudo_error },
|
|
385
|
|
386 // these are *dangerous*
|
|
387 { "ifp1", { -1, -1, -1, -1}, pseudo_ifp1, 1 },
|
|
388 { "ifp2", { -1, -1, -1, -1}, pseudo_ifp2, 1 },
|
|
389
|
|
390 { "ifeq", { -1, -1, -1, -1}, pseudo_ifeq, 1 },
|
|
391 { "ifne", { -1, -1, -1, -1}, pseudo_ifne, 1 },
|
|
392 { "if", { -1, -1, -1, -1}, pseudo_ifne, 1 },
|
|
393 { "ifgt", { -1, -1, -1, -1}, pseudo_ifgt, 1 },
|
|
394 { "ifge", { -1, -1, -1, -1}, pseudo_ifge, 1 },
|
|
395 { "iflt", { -1, -1, -1, -1}, pseudo_iflt, 1 },
|
|
396 { "ifle", { -1, -1, -1, -1}, pseudo_ifle, 1 },
|
|
397 { "endc", { -1, -1, -1, -1}, pseudo_endc, 1 },
|
|
398 { "else", { -1, -1, -1, -1}, pseudo_else, 1 },
|
|
399 { "ifdef", { -1, -1, -1, -1}, pseudo_ifdef, 1},
|
|
400 { "ifndef", { -1, -1, -1, -1}, pseudo_ifndef, 1},
|
|
401
|
|
402 { "macro", { -1, -1, -1, -1}, pseudo_macro, 1, 0, 1 },
|
|
403 { "endm", { -1, -1, -1, -1}, pseudo_endm, 1, 1, 1 },
|
|
404
|
|
405 { "setdp", { -1, -1, -1, -1}, pseudo_setdp },
|
|
406 { "set", { -1, -1, -1, -1}, pseudo_set, 0, 0, 1 },
|
|
407
|
|
408 { "section", { -1, -1, -1, -1}, pseudo_section },
|
|
409 { "sect", { -1, -1, -1, -1}, pseudo_section },
|
|
410 { "ends", { -1, -1, -1, -1}, pseudo_endsection },
|
|
411 { "endsect", { -1, -1, -1, -1}, pseudo_endsection },
|
|
412 { "endsection", { -1, -1, -1, -1}, pseudo_endsection },
|
|
413
|
|
414 { "pragma", { -1, -1, -1, -1}, pseudo_pragma },
|
|
415 { "*pragma", { -1, -1, -1, -1}, pseudo_starpragma },
|
|
416
|
|
417 // for os9 target
|
|
418 { "os9", { -1, -1, -1, -1 }, pseudo_os9 },
|
|
419 { "mod", { -1, -1, -1, -1 }, pseudo_mod },
|
|
420 { "emod", { -1, -1, -1, -1 }, pseudo_emod },
|
|
421
|
|
422 /* for compatibility with gcc6809 output... */
|
|
423 { ".area", { -1, -1, -1, -1}, pseudo_section },
|
|
424 { ".globl", { -1, -1, -1, -1}, pseudo_export },
|
|
425 { ".module", { -1, -1, -1, -1}, pseudo_noop },
|
|
426
|
|
427 { ".4byte", { -1, -1, -1, -1}, pseudo_fqb },
|
|
428 { ".quad", { -1, -1, -1, -1}, pseudo_fqb },
|
|
429
|
|
430 { ".word", { -1, -1, -1, -1}, pseudo_fdb },
|
|
431 { ".dw", { -1, -1, -1, -1}, pseudo_fdb },
|
|
432
|
|
433 { ".byte", { -1, -1, -1, -1}, pseudo_fcb },
|
|
434 { ".db", { -1, -1, -1, -1}, pseudo_fcb },
|
|
435
|
|
436 { ".ascii", { -1, -1, -1, -1}, pseudo_fcc },
|
|
437 { ".str", { -1, -1, -1, -1}, pseudo_fcc },
|
|
438
|
|
439 { ".ascis", { -1, -1, -1, -1}, pseudo_fcs },
|
|
440 { ".strs", { -1, -1, -1, -1}, pseudo_fcs },
|
|
441
|
|
442 { ".asciz", { -1, -1, -1, -1}, pseudo_fcn },
|
|
443 { ".strz", { -1, -1, -1, -1}, pseudo_fcn },
|
|
444
|
|
445 { ".blkb", { -1, -1, -1, -1}, pseudo_rmb },
|
|
446 { ".ds", { -1, -1, -1, -1}, pseudo_rmb },
|
|
447 { ".rs", { -1, -1, -1, -1}, pseudo_rmb },
|
|
448
|
|
449 // needs to handle C escapes maybe?
|
|
450 // { ".ascii", { -1, -1, -1, -1}, pseudo_ascii },
|
|
451
|
|
452 // for compatibility
|
|
453 { ".end", { -1, -1, -1, -1 }, pseudo_end },
|
|
454
|
|
455 // extra ops that are ignored because they are generally only for
|
|
456 // pretty printing the listing
|
|
457 { "nam", { -1, -1, -1, -1 }, pseudo_noop },
|
|
458 { "pag", { -1, -1, -1, -1 }, pseudo_noop },
|
|
459 { "ttl", { -1, -1, -1, -1 }, pseudo_noop },
|
|
460
|
|
461 /* flag end of table */
|
|
462 { NULL, { -0x1, -0x1, -0x1, -0x1 }, insn_inh }
|
|
463 };
|