annotate src/insn_misc.c @ 25:3b818f05dc2a

imported instruction table from older version to development version
author lost
date Fri, 02 Jan 2009 02:03:48 +0000
parents 34568fab6058
children f736579569b4
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1 /*
4
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2 insn_misc.c
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3 Copyright © 2008 William Astle
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4
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5 This file is part of LWASM.
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6
34568fab6058 Fixed package to include all required files; also added copyright preamble to all source files
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7 LWASM is free software: you can redistribute it and/or modify it under the
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8 terms of the GNU General Public License as published by the Free Software
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9 Foundation, either version 3 of the License, or (at your option) any later
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10 version.
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11
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12 This program is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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15 more details.
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16
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17 You should have received a copy of the GNU General Public License along with
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18 this program. If not, see <http://www.gnu.org/licenses/>.
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19
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20 Contains code for parsing miscelaneous addressing modes
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21 */
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22
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23 #include <ctype.h>
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24 #include <stdio.h>
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25 #include <string.h>
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26 #include "lwasm.h"
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27 #include "instab.h"
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28
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29 extern void insn_gen_aux(asmstate_t *as, sourceline_t *cl, char **optr, int *b1, int *b2, int *b3, int *op);
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30
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31 void insn_inh(asmstate_t *as, sourceline_t *cl, char **optr)
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32 {
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33 cl -> addrmode = OPER_INH;
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34 emitop(instab[cl -> opcode].ops[0]);
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35 }
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36
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37 void insn_rtor(asmstate_t *as, sourceline_t *cl, char **optr)
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38 {
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39 int r0, r1;
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40 static const char *regs = "D X Y U S PCW V A B CCDP0 0 E F ";
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41
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42 cl -> addrmode = OPER_RTOR;
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43 emitop(instab[cl -> opcode].ops[0]);
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44 // register to register (r0,r1)
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45 // registers are in order:
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46 // D,X,Y,U,S,PC,W,V
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47 // A,B,CC,DP,0,0,E,F
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48 r0 = lookupreg(regs, optr);
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49 if (r0 < 0 || *(*optr)++ != ',')
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50 {
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51 errorp1(ERR_BADOPER);
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52 r0 = r1 = 0;
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53 }
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54 else
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55 {
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56 r1 = lookupreg(regs, optr);
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57 if (r1 < 0)
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58 {
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59 errorp1(ERR_BADOPER);
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60 r0=r1=0;
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61 }
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62 }
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63 emit((r0 << 4) | r1);
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64 }
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65
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66 void insn_rlist(asmstate_t *as, sourceline_t *cl, char **optr)
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67 {
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68 int rb = 0;
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69 int rn;
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70 static const char *regs = "CCA B DPX Y U PCD S ";
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71
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72 emitop(instab[cl -> opcode].ops[0]);
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73 cl -> addrmode = OPER_RLIST;
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74 while (**optr && !isspace(**optr))
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75 {
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76 rn = lookupreg(regs, optr);
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77 if (rn < 0)
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78 {
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79 printf("Bad reg (%s)\n", *optr);
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80 errorp1(ERR_BADOPER);
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81 emit(0);
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82 return;
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83 }
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84 if (**optr && **optr != ',' && !isspace(**optr))
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85 {
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86 printf("Bad char (%c)\n", **optr);
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87 errorp1(ERR_BADOPER);
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88 emit(0);
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89 return;
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90 }
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91 if (**optr == ',')
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92 (*optr)++;
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93 if (rn == 8)
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94 rn = 6;
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95 else if (rn == 9)
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96 rn = 0x40;
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97 else
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98 rn = 1 << rn;
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99 rb |= rn;
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100 }
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101 emit(rb);
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102 }
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103
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104 // for aim, oim, eim, tim
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105 void insn_logicmem(asmstate_t *as, sourceline_t *cl, char **optr)
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106 {
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107 int rval, v1;
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108 int b1, b2, b3, op;
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109
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110 if (**optr == '#')
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111 (*optr)++;
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112
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113 rval = eval_expr(as, cl, optr, &v1);
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114 if (rval < 0)
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115 return;
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116
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117 if (v1 < -128 || v1 > 255)
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118 {
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119 errorp2(ERR_OVERFLOW);
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120 v1 = 0;
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121 }
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122
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123 if (**optr != ',' && **optr != ';')
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124 {
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125 errorp1(ERR_BADOPER);
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126 return;
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127 }
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128
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129 (*optr)++;
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130
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131 // now we have a general addressing mode - call for it
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132 insn_gen_aux(as, cl, optr, &b1, &b2, &b3, &op);
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133
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134 emitop(op);
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135 emit(v1 & 0xff);
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136 if (b1 != -1)
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137 {
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138 emit(b1);
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139 }
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140 if (b2 != -1)
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141 {
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142 emit(b2);
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143 }
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144 if (b3 != -1)
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145 {
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146 emit(b3);
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147 }
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148 }
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149
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150 void insn_tfm(asmstate_t *as, sourceline_t *cl, char **optr)
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151 {
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152 static const char *reglist = "DXYUS AB 00EF";
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153 int r0, r1;
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154 char *c;
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155 int tfm = 0;
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156
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157 cl -> addrmode = OPER_TFM;
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158
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159 c = strchr(reglist, toupper(*(*optr)++));
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160 if (!c)
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161 {
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162 errorp1(ERR_BADOPER);
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163 return;
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164 }
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165 r0 = c - reglist;
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166 if (**optr == '+')
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167 {
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168 (*optr)++;
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169 tfm = 1;
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170 }
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171 else if (**optr == '-')
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172 {
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173 (*optr)++;
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174 tfm = 2;
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175 }
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176 if (*(*optr)++ != ',')
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177 {
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178 errorp1(ERR_BADOPER);
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179 return;
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180 }
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181 c = strchr(reglist, toupper(*(*optr)++));
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182 if (!c)
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183 {
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184 errorp1(ERR_BADOPER);
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185 return;
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186 }
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187 r1 = c - reglist;
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188
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189 if (**optr == '+')
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190 {
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191 (*optr)++;
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192 tfm |= 4;
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193 }
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194 else if (**optr == '-')
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195 {
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196 (*optr)++;
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197 tfm |= 8;
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198 }
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199
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200 if (**optr && !isspace(**optr))
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201 {
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202 errorp1(ERR_BADOPER);
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203 return;
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204 }
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205
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206 // valid values of tfm here are:
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207 // 1: r0+,r1 (2)
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208 // 4: r0,r1+ (3)
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209 // 5: r0+,r1+ (0)
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210 // 10: r0-,r1- (1)
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211 switch (tfm)
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212 {
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213 case 5: //r0+,r1+
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214 emitop(instab[cl -> opcode].ops[0]);
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215 break;
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216 case 10: //r0-,r1-
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217 emitop(instab[cl -> opcode].ops[1]);
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218 break;
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219 case 1: // r0+,r1
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220 emitop(instab[cl -> opcode].ops[2]);
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221 break;
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222 case 4: // r0,r1+
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223 emitop(instab[cl -> opcode].ops[3]);
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224 break;
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225 default:
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226 errorp1(ERR_BADOPER);
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227 return;
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228 }
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229 emit((r0 << 4) | r1);
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230 }
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231
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232 void insn_bitbit(asmstate_t *as, sourceline_t *cl, char **optr)
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233 {
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234 int r;
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235 int rval;
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236 int v1;
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237 int tv;
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238
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239 emitop(instab[cl -> opcode].ops[0]);
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240
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241 cl -> addrmode = OPER_BITBIT;
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242
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243 r = toupper(*(*optr)++);
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244 if (r == 'A')
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245 r = 1;
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246 else if (r == 'B')
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247 r = 2;
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248 else if (r == 'C' && toupper(**optr) == 'C')
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249 {
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250 r = 0;
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251 (*optr)++;
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252 }
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253 else
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254 {
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255 errorp1(ERR_BADREG);
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256 return;
57495da01900 Initial checking of LWASM
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257 }
57495da01900 Initial checking of LWASM
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258 if (*(*optr)++ != ',')
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259 {
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260 errorp1(ERR_BADOPER);
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261 return;
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262 }
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263 rval = eval_expr(as, cl, optr, &v1);
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264 if (v1 < 0 || v1 > 7)
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265 {
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266 errorp2(ERR_OVERFLOW3);
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267 v1 = 0;
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268 }
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269 if (*(*optr)++ != ',')
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270 {
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271 errorp1(ERR_BADOPER);
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272 return;
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273 }
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274 r = (r << 6) | (v1 << 3);
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275 rval = eval_expr(as, cl, optr, &v1);
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276 if (v1 < 0 || v1 > 7)
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277 {
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278 errorp2(ERR_OVERFLOW3);
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279 v1 = 0;
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280 }
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281 if (*(*optr)++ != ',')
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parents:
diff changeset
282 {
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283 errorp1(ERR_BADOPER);
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284 return;
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parents:
diff changeset
285 }
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286 r |= v1;
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287
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288 emit(r);
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289
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parents:
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290 // ignore base page address modifier
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parents:
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291 if (**optr == '<')
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parents:
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292 optr++;
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293
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294 rval = eval_expr(as, cl, optr, &v1);
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parents:
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295 v1 &= 0xFFFF;
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parents:
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296 tv = v1 - ((cl -> dpval) << 8);
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parents:
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297 if (tv > 0xFF || tv < 0)
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parents:
diff changeset
298 errorp2(ERR_OVERFLOW);
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parents:
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299 emit(tv & 0xff);
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parents:
diff changeset
300 }
57495da01900 Initial checking of LWASM
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parents:
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301
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parents:
diff changeset
302 void insn_rel8(asmstate_t *as, sourceline_t *cl, char **optr)
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parents:
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303 {
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parents:
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304 int v1, rval;
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parents:
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305
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parents:
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306 emitop(instab[cl -> opcode].ops[0]);
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parents:
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307 cl -> addrmode = OPER_REL8;
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parents:
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308 rval = eval_expr(as, cl, optr, &v1);
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309 v1 &= 0xFFFF;
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parents:
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310 v1 -= cl -> addr + 2;
57495da01900 Initial checking of LWASM
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parents:
diff changeset
311 if (v1 < -128 || v1 > 127)
57495da01900 Initial checking of LWASM
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parents:
diff changeset
312 errorp2(ERR_OVERFLOW);
57495da01900 Initial checking of LWASM
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313 v1 &= 0xFFFF;
57495da01900 Initial checking of LWASM
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parents:
diff changeset
314 emit(v1 & 0xff);
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parents:
diff changeset
315 }
57495da01900 Initial checking of LWASM
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parents:
diff changeset
316
57495da01900 Initial checking of LWASM
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parents:
diff changeset
317 void insn_rel16(asmstate_t *as, sourceline_t *cl, char **optr)
57495da01900 Initial checking of LWASM
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318 {
57495da01900 Initial checking of LWASM
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diff changeset
319 int v1, rval;
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parents:
diff changeset
320
57495da01900 Initial checking of LWASM
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parents:
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321 emitop(instab[cl -> opcode].ops[0]);
57495da01900 Initial checking of LWASM
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parents:
diff changeset
322 cl -> addrmode = OPER_REL16;
57495da01900 Initial checking of LWASM
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parents:
diff changeset
323 rval = eval_expr(as, cl, optr, &v1);
57495da01900 Initial checking of LWASM
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parents:
diff changeset
324 v1 &= 0xFFFF;
57495da01900 Initial checking of LWASM
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parents:
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325 v1 -= cl -> addr + 3;
57495da01900 Initial checking of LWASM
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parents:
diff changeset
326 if (instab[cl -> opcode].ops[0] > 0xff)
57495da01900 Initial checking of LWASM
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parents:
diff changeset
327 v1 -= 1;
57495da01900 Initial checking of LWASM
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parents:
diff changeset
328 v1 &= 0xFFFF;
57495da01900 Initial checking of LWASM
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parents:
diff changeset
329 emit(v1 >> 8);
57495da01900 Initial checking of LWASM
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parents:
diff changeset
330 emit(v1 & 0xff);
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
331 }