annotate src/insn_gen.c @ 81:b6b1e79cc277

Moved indexed modes to new expression framework
author lost
date Sat, 10 Jan 2009 19:05:15 +0000
parents a338d496350e
children 81fc353d4d69
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1 /*
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2 insn_gen.c, Copyright © 2009 William Astle
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4 This file is part of LWASM.
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5
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6 LWASM is free software: you can redistribute it and/or modify it under the
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7 terms of the GNU General Public License as published by the Free Software
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8 Foundation, either version 3 of the License, or (at your option) any later
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9 version.
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10
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11 This program is distributed in the hope that it will be useful, but WITHOUT
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12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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14 more details.
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15
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16 You should have received a copy of the GNU General Public License along with
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17 this program. If not, see <http://www.gnu.org/licenses/>.
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18
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19 Contains code for parsing general addressing modes (IMM+DIR+EXT+IND)
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20 */
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21
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22 #include <ctype.h>
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23 #include <stdlib.h>
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24
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25 #include "lwasm.h"
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26 #include "instab.h"
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27 #include "expr.h"
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28
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29 extern void insn_indexed_aux(asmstate_t *as, lwasm_line_t *l, const char **p, int *b1, int *b2, int *b3);
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30
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31 // "extra" is required due to the way OIM, EIM, TIM, and AIM work
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32 void insn_gen_aux(asmstate_t *as, lwasm_line_t *l, char **optr, int opnum, int extra)
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33 {
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34 int b1 = -1, b2 = -1, b3 = -1;
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35
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36 const char *optr2;
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37 int v1, tv, rval;
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38 lwasm_expr_stack_t *s;
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39 int f8 = 0;
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40 int f16 = 0;
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41 int isdp = 0;
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42
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43 optr2 = *optr;
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44 while (*optr2 && !isspace(*optr2) && *optr2 != ',') optr2++
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45 /* do nothing */ ;
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46
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47 if (*optr2 != ',' && **optr != '[')
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48 {
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49 // not indexed
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50 if (l -> fsize == 1)
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51 f8 = 1;
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52 else if (l -> fsize == 2)
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53 f16 = 1;
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54
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55 if (**optr == '<')
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56 {
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57 (*optr)++;
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58 f8 = 1;
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59 }
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60 else if (**optr == '>')
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61 {
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62 (*optr)++;
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63 f16 = 1;
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64 }
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65 rval = lwasm_expr_result2(as, l, optr, 0, &v1, 0);
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66 if (rval != 0)
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67 {
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68 f16 = 1;
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69 v1 = 0;
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70 l -> fsize = 2;
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71 }
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72
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73 if (((v1 >> 8) & 0xff) == (as -> dpval & 0xff))
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74 isdp = 1;
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75
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76 // disallow non-explicit DP in obj target
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77 if (as -> outformat == OUTPUT_OBJ && !f8)
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78 f16 = 1;
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79
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80 if (f8 || (!f16 && isdp))
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81 {
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82 v1 = v1 & 0xffff;
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83 tv = v1 - ((as -> dpval) << 8);
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84 if (tv < 0 || tv > 0xff)
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85 {
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86 register_error(as, l, 2, "Byte overflow");
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87 }
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88 v1 = v1 & 0xff;
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89 lwasm_emitop(as, l, instab[opnum].ops[0]);
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90 if (extra != -1)
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91 lwasm_emit(as, l, extra);
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92 lwasm_emit(as, l, v1 & 0xff);
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93 return;
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94 }
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95 else
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96 {
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97 // everything else is 16 bit....
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98 lwasm_emitop(as, l, instab[opnum].ops[2]);
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99 if (extra != -1)
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100 lwasm_emit(as, l, extra);
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101 l -> relocoff = as -> addr - l -> codeaddr;
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102 lwasm_emit(as, l, v1 >> 8);
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103 lwasm_emit(as, l, v1 & 0xff);
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104 return;
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105 }
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106 }
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107
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108 lwasm_emitop(as, l, instab[opnum].ops[1]);
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109 if (extra != -1)
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110 lwasm_emit(as, l, extra);
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111 insn_indexed_aux(as, l, (const char **)optr, &b1, &b2, &b3);
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112 if (b1 != -1)
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113 lwasm_emit(as, l, b1);
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114 if (b2 != -1)
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115 lwasm_emit(as, l, b2);
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116 if (b3 != -1)
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117 lwasm_emit(as, l, b3);
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118 return;
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119 }
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120
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121 // the various insn_gen? functions have an immediate mode of ? bits
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122 OPFUNC(insn_gen0)
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123 {
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124 if (**p == '#')
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125 {
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126 register_error(as, l, 1, "Immediate mode not allowed");
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127 return;
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128 }
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129
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130 // handle non-immediate
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131 insn_gen_aux(as, l, p, opnum, -1);
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132 }
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133
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134 OPFUNC(insn_gen8)
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135 {
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136 int rval;
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137 int r;
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138
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139 if (**p == '#')
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140 {
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141 lwasm_emitop(as, l, instab[opnum].ops[3]);
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142 (*p)++;
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143 r = lwasm_expr_result2(as, l, p, EXPR_PASS2CONST | EXPR_BYTE, &rval, 0);
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144 if (r != 0)
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145 rval = 0;
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146 if (r == 1 && as -> passnum == 2)
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147 register_error(as, l, 2, "Illegal external or intersegment reference");
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148 lwasm_emit(as, l, rval & 0xff);
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149 return;
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150 }
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151
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152 insn_gen_aux(as, l, p, opnum, -1);
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153 }
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154
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155 OPFUNC(insn_gen16)
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156 {
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157 int rval, r;
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158
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159 if (**p == '#')
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160 {
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161 lwasm_emitop(as, l, instab[opnum].ops[3]);
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162 (*p)++;
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163
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164 r = lwasm_expr_result2(as, l, p, 0, &rval, 0);
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165 if (r != 0)
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166 rval = 0;
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167 if (r == 1 && as -> passnum == 2)
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168 {
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169 l -> relocoff = as -> addr - l -> codeaddr;
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170 }
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171 lwasm_emit(as, l, (rval >> 8) & 0xff);
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172 lwasm_emit(as, l, rval & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
173 return;
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
174 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
175
34
b29eec6f3819 Finished adding addressing mode handlers
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parents: 33
diff changeset
176 insn_gen_aux(as, l, p, opnum, -1);
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
177 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
178
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
179 OPFUNC(insn_gen32)
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
180 {
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
181 int r, rval;
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
182
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
183 if (**p == '#')
0
57495da01900 Initial checking of LWASM
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parents:
diff changeset
184 {
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
185 lwasm_emitop(as, l, instab[opnum].ops[3]);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
186 (*p)++;
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
187
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
188 r = lwasm_expr_result2(as, l, p, 0, &rval, 0);
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
189 if (r != 0)
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
190 rval = 0;
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
191 if (r == 1 && as -> passnum == 2)
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
192 {
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
193 register_error(as, l, 2, "Illegal external or intersegment reference");
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
194 }
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
195
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
196 lwasm_emit(as, l, (rval >> 24) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
197 lwasm_emit(as, l, (rval >> 16) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
198 lwasm_emit(as, l, (rval >> 8) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
199 lwasm_emit(as, l, rval & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
200 return;
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
201 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
202
34
b29eec6f3819 Finished adding addressing mode handlers
lost
parents: 33
diff changeset
203 insn_gen_aux(as, l, p, opnum, -1);
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
204 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
205
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
206 OPFUNC(insn_imm8)
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
207 {
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
208 int r, rval;
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
209
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
210 if (**p == '#')
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
211 {
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
212 lwasm_emitop(as, l, instab[opnum].ops[0]);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
213 (*p)++;
77
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
214
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
215 r = lwasm_expr_result2(as, l, p, EXPR_PASS2CONST | EXPR_BYTE, &rval, 0);
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
216 if (r != 0)
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
217 rval = 0;
77
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
218 if (r == 1 && as -> passnum == 2)
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
219 register_error(as, l, 2, "Illegal external or intersegment reference");
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
220
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
221 if (rval < -128 || rval > 255)
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
222 register_error(as, l, 2, "Byte overflow");
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
223 lwasm_emit(as, l, rval & 0xff);
0
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
224 return;
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
225 }
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
226
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
227 register_error(as, l, 1, "Bad operand");
0
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
228 }