annotate lwasm/insn_gen.c @ 259:c3a34f820893 2.x

Added asprintf redux
author lost
date Tue, 22 Dec 2009 05:53:25 +0000
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1 /*
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2 insn_gen.c, Copyright © 2009 William Astle
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4 This file is part of LWASM.
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5
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6 LWASM is free software: you can redistribute it and/or modify it under the
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7 terms of the GNU General Public License as published by the Free Software
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8 Foundation, either version 3 of the License, or (at your option) any later
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9 version.
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10
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11 This program is distributed in the hope that it will be useful, but WITHOUT
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12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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14 more details.
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15
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16 You should have received a copy of the GNU General Public License along with
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17 this program. If not, see <http://www.gnu.org/licenses/>.
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18
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19 Contains code for parsing general addressing modes (IMM+DIR+EXT+IND)
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20 */
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21
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22 #include <config.h>
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23
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24 #include <ctype.h>
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25 #include <stdlib.h>
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26
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27 #include "lwasm.h"
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28 #include "instab.h"
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29 #include "expr.h"
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30
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31 extern void insn_indexed_aux(asmstate_t *as, lwasm_line_t *l, const char **p, int *b1, int *b2, int *b3);
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32
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33 // "extra" is required due to the way OIM, EIM, TIM, and AIM work
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34 void insn_gen_aux(asmstate_t *as, lwasm_line_t *l, char **optr, int opnum, int extra)
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35 {
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36 int b1 = -1, b2 = -1, b3 = -1;
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37
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38 const char *optr2;
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39 int v1, tv, rval;
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40 lwasm_expr_stack_t *s;
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41 int f8 = 0;
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42 int f16 = 0;
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43 int isdp = 0;
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44
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45 optr2 = *optr;
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46 while (*optr2 && !isspace(*optr2) && *optr2 != ',') optr2++
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47 /* do nothing */ ;
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48
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49 if (*optr2 != ',' && **optr != '[')
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50 {
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51 // not indexed
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52 if (l -> fsize == 1)
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53 f8 = 1;
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54 else if (l -> fsize == 2)
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55 f16 = 1;
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56
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57 if (**optr == '<')
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58 {
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59 (*optr)++;
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60 f8 = 1;
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61 }
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62 // for compatibility with asxxxx
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63 // * followed by a digit, alpha, or _, or ., or ?, or another * is "f8"
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64 else if (**optr == '*')
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65 {
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66 tv = *(*optr + 1);
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67 if (isdigit(tv) || isalpha(tv) || tv == '_' || tv == '.' || tv == '?' || tv == '@' || tv == '*' || tv == '+' || tv == '-')
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68 {
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69 f8 = 1;
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70 (*optr)++;
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71 }
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72 }
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73 else if (**optr == '>')
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74 {
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75 (*optr)++;
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76 f16 = 1;
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77 }
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78 rval = lwasm_expr_result2(as, l, optr, 0, &v1, 0);
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79 if (rval != 0)
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80 {
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81 f16 = 1;
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82 v1 = 0;
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83 l -> fsize = 2;
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84 }
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85
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86 if (((v1 >> 8) & 0xff) == (as -> dpval & 0xff))
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87 isdp = 1;
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88
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89 // disallow non-explicit DP in obj target
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90 if (as -> outformat == OUTPUT_OBJ && !f8)
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91 f16 = 1;
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92
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93 if (f8 || (!f16 && isdp))
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94 {
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95 v1 = v1 & 0xffff;
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96 tv = v1 - ((as -> dpval) << 8);
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97 if (tv < 0 || tv > 0xff)
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98 {
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99 register_error(as, l, 2, "Byte overflow");
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100 }
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101 v1 = v1 & 0xff;
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102 lwasm_emitop(as, l, instab[opnum].ops[0]);
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103 if (extra != -1)
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104 lwasm_emit(as, l, extra);
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105 l -> relocoff = as -> addr - l -> codeaddr;
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106 l -> reloc8bit = 1;
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107 lwasm_emit(as, l, v1 & 0xff);
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108 return;
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109 }
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110 else
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111 {
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112 // everything else is 16 bit....
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113 lwasm_emitop(as, l, instab[opnum].ops[2]);
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114 if (extra != -1)
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115 lwasm_emit(as, l, extra);
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116 l -> relocoff = as -> addr - l -> codeaddr;
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117 lwasm_emit(as, l, v1 >> 8);
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118 lwasm_emit(as, l, v1 & 0xff);
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119 return;
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120 }
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121 }
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122
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123 lwasm_emitop(as, l, instab[opnum].ops[1]);
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124 if (extra != -1)
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125 lwasm_emit(as, l, extra);
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126 insn_indexed_aux(as, l, (const char **)optr, &b1, &b2, &b3);
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127 if (b1 != -1)
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128 lwasm_emit(as, l, b1);
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129 if (b2 != -1)
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130 lwasm_emit(as, l, b2);
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131 if (b3 != -1)
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132 lwasm_emit(as, l, b3);
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133 return;
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134 }
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135
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136 // the various insn_gen? functions have an immediate mode of ? bits
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137 OPFUNC(insn_gen0)
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138 {
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139 if (**p == '#')
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140 {
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141 register_error(as, l, 1, "Immediate mode not allowed");
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142 return;
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143 }
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144
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145 // handle non-immediate
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146 insn_gen_aux(as, l, p, opnum, -1);
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147 }
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148
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149 OPFUNC(insn_gen8)
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150 {
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151 int rval;
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152 int r;
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153
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154 if (**p == '#')
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155 {
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156 lwasm_emitop(as, l, instab[opnum].ops[3]);
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157 (*p)++;
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158 r = lwasm_expr_result2(as, l, p, 0, &rval, 0);
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159 if (r != 0)
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160 rval = 0;
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161 if (r == 1 && as -> passnum == 2)
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162 {
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163 l -> relocoff = as -> addr - l -> codeaddr;
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164 l -> reloc8bit = 1;
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165 }
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166 // register_error(as, l, 2, "Illegal external or intersegment reference");
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167 lwasm_emit(as, l, rval & 0xff);
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168 return;
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169 }
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170
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171 insn_gen_aux(as, l, p, opnum, -1);
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172 }
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173
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diff changeset
174 OPFUNC(insn_gen16)
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175 {
77
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176 int rval, r;
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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177
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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178 if (**p == '#')
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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179 {
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180 lwasm_emitop(as, l, instab[opnum].ops[3]);
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181 (*p)++;
77
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182
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183 r = lwasm_expr_result2(as, l, p, 0, &rval, 0);
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184 if (r != 0)
33
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185 rval = 0;
77
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diff changeset
186 if (r == 1 && as -> passnum == 2)
33
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187 {
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188 l -> relocoff = as -> addr - l -> codeaddr;
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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189 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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190 lwasm_emit(as, l, (rval >> 8) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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191 lwasm_emit(as, l, rval & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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diff changeset
192 return;
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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193 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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diff changeset
194
34
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diff changeset
195 insn_gen_aux(as, l, p, opnum, -1);
33
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196 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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diff changeset
197
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
198 OPFUNC(insn_gen32)
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parents: 4
diff changeset
199 {
77
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diff changeset
200 int r, rval;
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
201
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
202 if (**p == '#')
0
57495da01900 Initial checking of LWASM
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parents:
diff changeset
203 {
33
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parents: 4
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204 lwasm_emitop(as, l, instab[opnum].ops[3]);
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diff changeset
205 (*p)++;
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
206
a338d496350e Checkpointing conversion to allow object target
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diff changeset
207 r = lwasm_expr_result2(as, l, p, 0, &rval, 0);
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diff changeset
208 if (r != 0)
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parents: 65
diff changeset
209 rval = 0;
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parents: 65
diff changeset
210 if (r == 1 && as -> passnum == 2)
33
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parents: 4
diff changeset
211 {
77
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parents: 65
diff changeset
212 register_error(as, l, 2, "Illegal external or intersegment reference");
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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diff changeset
213 }
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
214
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
215 lwasm_emit(as, l, (rval >> 24) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
216 lwasm_emit(as, l, (rval >> 16) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
217 lwasm_emit(as, l, (rval >> 8) & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
218 lwasm_emit(as, l, rval & 0xff);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
219 return;
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
220 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
221
34
b29eec6f3819 Finished adding addressing mode handlers
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parents: 33
diff changeset
222 insn_gen_aux(as, l, p, opnum, -1);
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
223 }
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
224
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
225 OPFUNC(insn_imm8)
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
226 {
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
227 int r, rval;
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
228
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
229 if (**p == '#')
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
230 {
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
231 lwasm_emitop(as, l, instab[opnum].ops[0]);
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
232 (*p)++;
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
233
98
81fc353d4d69 Cleaned up old lwasm_expr_result() function and unused EXPR_* flags
lost
parents: 77
diff changeset
234 r = lwasm_expr_result2(as, l, p, 0, &rval, 0);
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
235 if (r != 0)
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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parents: 4
diff changeset
236 rval = 0;
77
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
237 if (r == 1 && as -> passnum == 2)
a338d496350e Checkpointing conversion to allow object target
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parents: 65
diff changeset
238 register_error(as, l, 2, "Illegal external or intersegment reference");
a338d496350e Checkpointing conversion to allow object target
lost
parents: 65
diff changeset
239
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
240 if (rval < -128 || rval > 255)
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
241 register_error(as, l, 2, "Byte overflow");
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
242 lwasm_emit(as, l, rval & 0xff);
0
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
243 return;
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
244 }
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
245
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
lost
parents: 4
diff changeset
246 register_error(as, l, 1, "Bad operand");
0
57495da01900 Initial checking of LWASM
lost
parents:
diff changeset
247 }