annotate src/insn_indexed.c @ 74:c8c772ef5df9

Checkpointing object target implementation
author lost
date Thu, 08 Jan 2009 01:18:40 +0000
parents 538e15927776
children b6b1e79cc277
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1 /*
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2 insn_indexed.c
33
74a3fef7c8d0 Added general addressing modes (immediate, base page, extended, indexed)
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3 Copyright © 2009 William Astle
32
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4
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5 This file is part of LWASM.
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6
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7 LWASM is free software: you can redistribute it and/or modify it under the
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8 terms of the GNU General Public License as published by the Free Software
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9 Foundation, either version 3 of the License, or (at your option) any later
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10 version.
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11
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12 This program is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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15 more details.
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16
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17 You should have received a copy of the GNU General Public License along with
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18 this program. If not, see <http://www.gnu.org/licenses/>.
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19 */
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20
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21 /*
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22 for handling indexed mode instructions
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23 */
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24
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25 #define __insn_indexed_c_seen__
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26
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27 #include <ctype.h>
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28 #include <string.h>
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29
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30 #include "lwasm.h"
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31 #include "instab.h"
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32 #include "expr.h"
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33
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34 void insn_indexed_aux(asmstate_t *as, lwasm_line_t *l, const char **p, int *b1, int *b2, int *b3)
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35 {
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36 static const char *regs = "X Y U S W PCRPC ";
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37 static const struct { char *opstr; int pb; } simpleindex[] =
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38 {
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39 {",x", 0x84}, {",y", 0xa4}, {",u", 0xc4}, {",s", 0xe4},
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40 {",x+", 0x80}, {",y+", 0xa0}, {",u+", 0xc0}, {",s+", 0xe0},
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41 {",x++", 0x81}, {",y++", 0xa1}, {",u++", 0xc1}, {",s++", 0xe1},
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42 {",-x", 0x82}, {",-y", 0xa2}, {",-u", 0xc2}, {",-s", 0xe2},
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43 {",--x", 0x83}, {",--y", 0xa3}, {",--u", 0xc3}, {",--s", 0xe3},
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44 {"a,x", 0x86}, {"a,y", 0xa6}, {"a,u", 0xc6}, {"a,s", 0xe6},
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45 {"b,x", 0x85}, {"b,y", 0xa5}, {"b,u", 0xc5}, {"b,s", 0xe5},
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46 {"e,x", 0x87}, {"e,y", 0xa7}, {"e,u", 0xc7}, {"e,s", 0xe7},
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47 {"f,x", 0x8a}, {"f,y", 0xaa}, {"f,u", 0xca}, {"f,s", 0xea},
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48 {"d,x", 0x8b}, {"d,y", 0xab}, {"d,u", 0xcb}, {"d,s", 0xed},
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49 {"w,x", 0x8e}, {"w,y", 0xae}, {"w,u", 0xce}, {"w,s", 0xee},
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50 {",w", 0x8f}, {",w++", 0xcf}, {",--w", 0xef},
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51
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52 {"[,x]", 0x94}, {"[,y]", 0xb4}, {"[,u", 0xd4}, {"[,s]", 0xf4},
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53 {"[,x++]", 0x91}, {"[,y++]", 0xb1}, {"[,u++]", 0xd1}, {"[,s++]", 0xf1},
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54 {"[,--x]", 0x93}, {"[,--y]", 0xb3}, {"[,--u]", 0xd3}, {"[,--s]", 0xf3},
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55 {"[a,x]", 0x96}, {"[a,y]", 0xb6}, {"[a,u]", 0xd6}, {"[a,s]", 0xf6},
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56 {"[b,x]", 0x95}, {"[b,y]", 0xb5}, {"[b,u]", 0xd5}, {"[b,s]", 0xf5},
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57 {"[e,x]", 0x97}, {"[e,y]", 0xb7}, {"[e,u]", 0xd7}, {"[e,s]", 0xf7},
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58 {"[f,x]", 0x9a}, {"[f,y]", 0xba}, {"[f,u]", 0xda}, {"[f,s]", 0xfa},
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59 {"[d,x]", 0x9b}, {"[d,y]", 0xbb}, {"[d,u]", 0xdb}, {"[d,s]", 0xfd},
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60 {"[w,x]", 0x9e}, {"[w,y]", 0xbe}, {"[w,u]", 0xde}, {"[w,s]", 0xfe},
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61 {"[,w]", 0x90}, {"[,w++]", 0xd0}, {"[,--w]", 0xf0},
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62
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63 { "", -1 }
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64 };
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65 char stbuf[25];
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66 int i;
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67 int f8 = 0, f16 = 0;
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68 int rn;
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69 int indir = 0;
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70 int rval;
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71 int f0 = 0;
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72 const char *p2;
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73 lwasm_expr_stack_t *s;
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74
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75 *b1 = *b2 = *b3 = -1;
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76
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77 for (i = 0; i < 24; i++)
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78 {
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79 if (*((*p) + i) && !isspace(*((*p) + i)))
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80 stbuf[i] = *((*p) + i);
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81 else
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82 break;
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83 }
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84 stbuf[i] = '\0';
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85 if (!*((*p) + i) || isspace(*((*p) + i)))
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86 {
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87 int j;
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88 // do simple lookup
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89 for (j = 0; simpleindex[j].opstr[0]; j++)
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90 {
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91 if (!strcasecmp(stbuf, simpleindex[j].opstr))
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92 break;
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93 }
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94 if (simpleindex[j].opstr[0])
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95 {
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96 *b1 = simpleindex[j].pb;
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97 (*p) += i;
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98 return;
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99 }
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100 }
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101
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102 // now we have the hard ones to work out here
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103
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104 // if we've previously forced the sizes, make a note of it
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105 if (l -> fsize == 1)
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106 f8 = 1;
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107 else if (l -> fsize == 2)
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108 f16 = 1;
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109
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110 if (**p == '[')
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111 {
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112 indir = 1;
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113 (*p)++;
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114 }
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115
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116 rn = 0;
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117 for (i = 0; (*p)[i] && !isspace((*p)[i]); i++)
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118 {
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119 if ((*p)[i] == ',')
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120 {
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121 rn = 1;
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122 break;
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123 }
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124 }
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125
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126 if (!rn && indir)
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127 {
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128 // extended indir
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129 *b1 = 0x9f;
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130 *b2 = 0;
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131 *b3 = 0;
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132 s = lwasm_evaluate_expr(as, l, *p, &p2);
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133 if (!s)
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134 {
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135 register_error(as, l, 1, "Bad expression");
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136 return;
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137 }
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138 *p = p2;
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139 if (**p != ']')
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140 {
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141 register_error(as, l, 1, "Bad operand");
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142 return;
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143 }
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144 (*p)++;
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145 if (!lwasm_expr_is_constant(s))
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146 {
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147 register_error(as, l, 2, "Incomplete reference");
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148 }
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149 rn = lwasm_expr_get_value(s);
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150 lwasm_expr_stack_free(s);
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151 *b2 = (rn >> 8) & 0xff;
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152 *b3 = rn & 0xff;
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153 return;
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154 }
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155
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156 if (**p == '<')
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157 {
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158 f8 = 1;
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159 (*p)++;
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160 }
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161 else if (**p == '>')
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162 {
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163 f16 = 1;
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164 (*p)++;
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165 }
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166
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167 if (**p == '0' && *(*p+1) == ',')
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168 {
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169 f0 = 1;
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170 }
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171
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172 // now we have to evaluate the expression
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173 s = lwasm_evaluate_expr(as, l, *p, &p2);
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174 *p = p2;
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175 if (!s)
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176 {
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177 register_error(as, l, 1, "Bad expression");
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178 return;
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179 }
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180 if (!lwasm_expr_is_constant(s))
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181 {
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182 register_error(as, l, 2, "Incomplete reference");
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183 if (!f8 && !f0)
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184 {
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185 f16 = 1;
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186 l -> fsize = 2;
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187 }
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188 }
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189 rval = lwasm_expr_get_value(s);
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190 lwasm_expr_stack_free(s);
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191
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192 // now look for a comma; if not present, explode
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193 if (*(*p)++ != ',')
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194 {
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195 // syntax error; force 0 bit
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196 *b1 = 00;
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197 return;
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198 }
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199
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200 // now get the register
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201 rn = lwasm_lookupreg3(regs, p);
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202 if (rn < 0)
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203 goto reterr;
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204
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205 if (indir)
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206 {
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207 if (**p != ']')
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208 goto reterr;
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209 else
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210 (*p)++;
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211 }
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parents:
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212
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parents:
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213 // nnnn,W is only 16 bit
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parents:
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214 if (rn == 4)
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parents:
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215 {
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parents:
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216 if (f8)
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parents:
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217 goto reterr;
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parents:
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218 if (!f16 && !f0 && !(as -> pragmas & PRAGMA_NOINDEX0TONONE) && rval == 0)
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parents:
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219 {
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parents:
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220 if (indir)
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parents:
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221 *b1 = 0x90;
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parents:
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222 else
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parents:
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223 *b1 = 0x8f;
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parents:
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224 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
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225 }
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parents:
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226 if (indir)
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parents:
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227 *b1 = 0xb0;
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parents:
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228 else
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parents:
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229 *b1 = 0xcf;
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parents:
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230 *b2 = (rval >> 8) & 0xff;
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parents:
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231 *b3 = rval & 0xff;
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parents:
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232 return;
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parents:
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233 }
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parents:
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234
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parents:
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235 if (indir) indir = 0x10;
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parents:
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236
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parents:
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237 // PCR? redo v1, v2 relative to current address
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parents:
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238 if (rn == 5)
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parents:
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239 {
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parents:
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240 rval -= as -> addr;
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parents:
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241
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parents:
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242 // we have a slight problem here
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parents:
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243 // PCR based on current insn loc is really
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parents:
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244 // -125 <= offset <= +130 (8 bit offset)
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parents:
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245 // NOTE: when we are called, we already have the opcode emitted
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parents:
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246 // so we only need to worry about the size of the operand
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parents:
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247 // hence the 2 and 3 magic numbers below instead of 3 and 4
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parents:
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248 // (and that also avoids errors with two byte opcodes, etc)
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parents:
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249 if (f8 || (!f16 && rval >= -125 && rval <= 130))
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parents:
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250 {
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parents:
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251 *b1 = indir | 0x8C;
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parents:
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252 rval -= 2;
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253 if (rval < -128 || rval > 127)
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parents:
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254 register_error(as, l, 2, "Byte overflow");
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parents:
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255 *b2 = rval & 0xff;
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parents:
diff changeset
256 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
257 }
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parents:
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258
9bd0fbfe7405 Added basic indexed mode handling
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parents:
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259 // anything else is 16 bit offset
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parents:
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260 // need 16 bit
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parents:
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261 *b1 = indir | 0x8D;
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parents:
diff changeset
262 rval -= 3;
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parents:
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263 *b2 = (rval >> 8) & 0xff;
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parents:
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264 *b3 = rval & 0xff;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
265 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
266 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
267
9bd0fbfe7405 Added basic indexed mode handling
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parents:
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268 // constant offset from PC
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parents:
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269 if (rn == 6)
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parents:
diff changeset
270 {
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parents:
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271 if (f8 || (!f16 && rval >= -128 && rval <= 127))
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parents:
diff changeset
272 {
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parents:
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273 *b1 = indir | 0x8C;
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parents:
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274 if (rval < -128 || rval > 127)
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parents:
diff changeset
275 register_error(as, l, 2, "Byte overflow");
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parents:
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276 *b2 = rval & 0xff;
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parents:
diff changeset
277 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
278 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
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279
9bd0fbfe7405 Added basic indexed mode handling
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parents:
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280 // everything else must be 16 bit
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parents:
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281 // need 16 bit
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parents:
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282 *b1 = indir | 0x8D;
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parents:
diff changeset
283 *b2 = (rval >> 8) & 0xff;
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parents:
diff changeset
284 *b3 = rval & 0xff;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
285 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
286 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
287
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
288 // we only have to deal with x,y,u,s here
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
289 if (!f8 && !f16 && rval >= -16 && rval <= 15)
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
290 {
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parents:
diff changeset
291 if (rval == 0 && !f0 && !(as -> pragmas & PRAGMA_NOINDEX0TONONE))
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
292 {
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
293 *b1 = rn << 5 | indir | 0x80 | 0x04;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
294 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
295 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
296 // we pick the smallest value here
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
297 if (indir)
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
298 {
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
299 f8 = 1;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
300 goto no5bit;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
301 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
302 *b1 = rn << 5 | (rval & 0x1F);
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
303 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
304 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
305 no5bit:
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
306 if (f16 || (!f8 && (rval < -128 || rval > 127)))
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
307 {
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
308 // must be a 16 bit offset here
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
309 *b1 = rn << 5 | indir | 0x80 | 0x09;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
310 *b2 = (rval >> 8) & 0xff;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
311 *b3 = rval & 0xff;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
312 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
313 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
314
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
315 // if we're here, we have an 8 bit offset
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
316 *b1 = rn << 5 | indir | 0x80 | 0x08;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
317 if (rval < -128 || rval > 127)
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
318 register_error(as, l, 2, "Byte overflow");
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parents:
diff changeset
319 *b2 = rval & 0xff;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
320 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
321 reterr:
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
322 *b1 = 0;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
323 return;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
324 }
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
325
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
326 OPFUNC(insn_indexed)
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parents:
diff changeset
327 {
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parents:
diff changeset
328 int b1, b2, b3;
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
329
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
330 lwasm_emitop(as, l, instab[opnum].ops[0]);
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
331
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
332 insn_indexed_aux(as, l, (const char **)p, &b1, &b2, &b3);
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
333 if (b1 != -1)
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
334 lwasm_emit(as, l, b1);
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
335 if (b2 != -1)
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
336 lwasm_emit(as, l, b2);
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
337 if (b3 != -1)
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
338 lwasm_emit(as, l, b3);
9bd0fbfe7405 Added basic indexed mode handling
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parents:
diff changeset
339 }