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comparison src/instab.h @ 13:05d4115b4860
Started work on new expression evaluator system and major code re-work for next release
author | lost |
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date | Wed, 22 Oct 2008 04:51:16 +0000 |
parents | 34568fab6058 |
children | 3b818f05dc2a |
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5:287a6905a63c | 13:05d4115b4860 |
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19 | 19 |
20 | 20 |
21 Contains definitions for the instruction table | 21 Contains definitions for the instruction table |
22 */ | 22 */ |
23 | 23 |
24 #include "lwasm.h" | |
25 | |
26 #ifndef __instab_h_seen__ | |
27 #define __instab_h_seen__ | |
28 | |
29 #define INSTYPE_INH 0 /* inherent addressing */ | |
30 #define INSTYPE_GEN 1 /* general addressing modes */ | |
31 #define INSTYPE_GEN8 2 /* general addressing, 8 bit immed */ | |
32 #define INSTYPE_GENNOIMM 3 /* no immediate addressing */ | |
33 #define INSTYPE_RTOR 4 /* register to register */ | |
34 #define INSTYPE_RLIST 5 /* register list */ | |
35 #define INSTYPE_REL8 6 /* relative addressing */ | |
36 #define INSTYPE_REL16 7 /* 16 bit relative addressing */ | |
37 #define INSTYPE_INDEX 8 /* indexed mode only */ | |
38 #define INSTYPE_IMM8 9 /* immediate only 8 bit (andcc, cwai) */ | |
39 #define INSTYPE_LOGICMEM 10 /* aim/oim/eim/tim */ | |
40 #define INSTYPE_BITBIT 11 /* bit to bit ops */ | |
41 #define INSTYPE_TFM 12 /* TFM ops */ | |
42 #define INSTYPE_GEN32 13 /* general addressing, 32 bit immed */ | |
43 #define INSTYPE_PSEUDO 14 /* special handling, pseudo op */ | |
44 | |
45 #define SPECIAL_EQU 1 /* equ */ | |
46 #define SPECIAL_ORG 2 /* org */ | |
47 #define SPECIAL_SETDP 3 | |
48 #define SPECIAL_FCB 4 | |
49 #define SPECIAL_FDB 5 | |
50 #define SPECIAL_FQB 6 | |
51 #define SPECIAL_FCC 7 | |
52 #define SPECIAL_FCS 8 | |
53 #define SPECIAL_FCN 9 | |
54 #define SPECIAL_RMB 10 | |
55 #define SPECIAL_ALIGN 11 | |
56 #define SPECIAL_END 12 | |
57 #define SPECIAL_INCLUDE 13 | |
58 #define SPECIAL_ENDM 14 | |
59 #define SPECIAL_ENDC 15 | |
60 #define SPECIAL_MACRO 16 | |
61 #define SPECIAL_COND 17 | |
62 #define SPECIAL_ELSE 18 | |
63 | |
64 typedef struct | 24 typedef struct |
65 { | 25 { |
66 char *opcode; /* the mneumonic */ | 26 char *opcode; /* the mneumonic */ |
67 int ops[4]; /* opcode values for up to four addr modes */ | 27 int ops[4]; /* opcode values for up to four addr modes */ |
68 int instype; /* type of instruction (see above) */ | 28 void (*p1fn)(asmstate_t *as, sourceline_t *cl, char **optr); |
69 int specialnum; /* type of special instruction */ | 29 void (*p2fn)(asmstate_t *as, sourceline_t *cl, char **optr); |
70 void (*opfn)(asmstate_t *as, sourceline_t *cl, char **optr); | |
71 } instab_t; | 30 } instab_t; |
72 | 31 |
73 #ifndef __instab_c_seen__ | 32 #ifndef __instab_c_seen__ |
74 extern instab_t instab[]; | 33 extern instab_t instab[]; |
75 #endif //__instab_c_seen__ | 34 #endif //__instab_c_seen__ |