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comparison src/insn_gen.c @ 34:b29eec6f3819

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Finished adding addressing mode handlers
author lost
date Fri, 02 Jan 2009 05:17:00 +0000
parents 74a3fef7c8d0
children 538e15927776
comparison
equal deleted inserted replaced
33:74a3fef7c8d0 34:b29eec6f3819
26 #include "instab.h" 26 #include "instab.h"
27 #include "expr.h" 27 #include "expr.h"
28 28
29 extern void insn_indexed_aux(asmstate_t *as, lwasm_line_t *l, const char **p, int *b1, int *b2, int *b3); 29 extern void insn_indexed_aux(asmstate_t *as, lwasm_line_t *l, const char **p, int *b1, int *b2, int *b3);
30 30
31 void insn_gen_aux(asmstate_t *as, lwasm_line_t *l, char **optr, int opnum) 31 // "extra" is required due to the way OIM, EIM, TIM, and AIM work
32 void insn_gen_aux(asmstate_t *as, lwasm_line_t *l, char **optr, int opnum, int extra)
32 { 33 {
33 int b1 = -1, b2 = -1, b3 = -1; 34 int b1 = -1, b2 = -1, b3 = -1;
34 35
35 const char *optr2; 36 const char *optr2;
36 int v1, tv, rval; 37 int v1, tv, rval;
83 { 84 {
84 register_error(as, l, 2, "Byte overflow"); 85 register_error(as, l, 2, "Byte overflow");
85 } 86 }
86 v1 = v1 & 0xff; 87 v1 = v1 & 0xff;
87 lwasm_emitop(as, l, instab[opnum].ops[0]); 88 lwasm_emitop(as, l, instab[opnum].ops[0]);
89 if (extra != -1)
90 lwasm_emit(as, l, extra);
88 lwasm_emit(as, l, v1 & 0xff); 91 lwasm_emit(as, l, v1 & 0xff);
89 return; 92 return;
90 } 93 }
91 else 94 else
92 { 95 {
93 // everything else is 16 bit.... 96 // everything else is 16 bit....
94 lwasm_emitop(as, l, instab[opnum].ops[2]); 97 lwasm_emitop(as, l, instab[opnum].ops[2]);
98 if (extra != -1)
99 lwasm_emit(as, l, extra);
95 lwasm_emit(as, l, v1 >> 8); 100 lwasm_emit(as, l, v1 >> 8);
96 lwasm_emit(as, l, v1 & 0xff); 101 lwasm_emit(as, l, v1 & 0xff);
97 return; 102 return;
98 } 103 }
99 } 104 }
100 105
101 lwasm_emitop(as, l, instab[opnum].ops[1]); 106 lwasm_emitop(as, l, instab[opnum].ops[1]);
107 if (extra != -1)
108 lwasm_emit(as, l, extra);
102 insn_indexed_aux(as, l, (const char **)optr, &b1, &b2, &b3); 109 insn_indexed_aux(as, l, (const char **)optr, &b1, &b2, &b3);
103 if (b1 != -1) 110 if (b1 != -1)
104 lwasm_emit(as, l, b1); 111 lwasm_emit(as, l, b1);
105 if (b2 != -1) 112 if (b2 != -1)
106 lwasm_emit(as, l, b2); 113 lwasm_emit(as, l, b2);
117 register_error(as, l, 1, "Immediate mode not allowed"); 124 register_error(as, l, 1, "Immediate mode not allowed");
118 return; 125 return;
119 } 126 }
120 127
121 // handle non-immediate 128 // handle non-immediate
122 insn_gen_aux(as, l, p, opnum); 129 insn_gen_aux(as, l, p, opnum, -1);
123 } 130 }
124 131
125 OPFUNC(insn_gen8) 132 OPFUNC(insn_gen8)
126 { 133 {
127 lwasm_expr_stack_t *s; 134 lwasm_expr_stack_t *s;
148 register_error(as, l, 2, "Byte overflow"); 155 register_error(as, l, 2, "Byte overflow");
149 lwasm_emit(as, l, rval & 0xff); 156 lwasm_emit(as, l, rval & 0xff);
150 return; 157 return;
151 } 158 }
152 159
153 insn_gen_aux(as, l, p, opnum); 160 insn_gen_aux(as, l, p, opnum, -1);
154 } 161 }
155 162
156 OPFUNC(insn_gen16) 163 OPFUNC(insn_gen16)
157 { 164 {
158 lwasm_expr_stack_t *s; 165 lwasm_expr_stack_t *s;
178 lwasm_emit(as, l, (rval >> 8) & 0xff); 185 lwasm_emit(as, l, (rval >> 8) & 0xff);
179 lwasm_emit(as, l, rval & 0xff); 186 lwasm_emit(as, l, rval & 0xff);
180 return; 187 return;
181 } 188 }
182 189
183 insn_gen_aux(as, l, p, opnum); 190 insn_gen_aux(as, l, p, opnum, -1);
184 } 191 }
185 192
186 OPFUNC(insn_gen32) 193 OPFUNC(insn_gen32)
187 { 194 {
188 lwasm_expr_stack_t *s; 195 lwasm_expr_stack_t *s;
210 lwasm_emit(as, l, (rval >> 8) & 0xff); 217 lwasm_emit(as, l, (rval >> 8) & 0xff);
211 lwasm_emit(as, l, rval & 0xff); 218 lwasm_emit(as, l, rval & 0xff);
212 return; 219 return;
213 } 220 }
214 221
215 insn_gen_aux(as, l, p, opnum); 222 insn_gen_aux(as, l, p, opnum, -1);
216 } 223 }
217 224
218 OPFUNC(insn_imm8) 225 OPFUNC(insn_imm8)
219 { 226 {
220 lwasm_expr_stack_t *s; 227 lwasm_expr_stack_t *s;