/*
 * instab.h
 *
 * definitions for the instruction table
 */

#include "lwasm.h"

#ifndef __instab_h_seen__
#define __instab_h_seen__

#define INSTYPE_INH			0	/* inherent addressing */
#define INSTYPE_GEN			1	/* general addressing modes */
#define INSTYPE_GEN8		2	/* general addressing, 8 bit immed */
#define INSTYPE_GENNOIMM	3	/* no immediate addressing */
#define INSTYPE_RTOR		4	/* register to register */
#define INSTYPE_RLIST		5	/* register list */
#define INSTYPE_REL8		6	/* relative addressing */
#define INSTYPE_REL16		7	/* 16 bit relative addressing */
#define INSTYPE_INDEX		8	/* indexed mode only */
#define INSTYPE_IMM8		9	/* immediate only 8 bit (andcc, cwai) */
#define INSTYPE_LOGICMEM	10	/* aim/oim/eim/tim */
#define INSTYPE_BITBIT		11	/* bit to bit ops */
#define INSTYPE_TFM			12	/* TFM ops */
#define INSTYPE_GEN32		13	/* general addressing, 32 bit immed */
#define INSTYPE_PSEUDO		14	/* special handling, pseudo op */

#define SPECIAL_EQU		1	/* equ */
#define	SPECIAL_ORG		2	/* org */
#define SPECIAL_SETDP	3
#define SPECIAL_FCB		4
#define SPECIAL_FDB		5
#define SPECIAL_FQB		6
#define SPECIAL_FCC		7
#define SPECIAL_FCS		8
#define SPECIAL_FCN		9
#define SPECIAL_RMB		10
#define SPECIAL_ALIGN	11
#define SPECIAL_END		12
#define SPECIAL_INCLUDE	13
#define SPECIAL_ENDM	14
#define SPECIAL_ENDC	15
#define SPECIAL_MACRO	16
#define SPECIAL_COND	17
#define SPECIAL_ELSE	18

typedef struct
{
	char *opcode;				/* the mneumonic */
	int ops[4];					/* opcode values for up to four addr modes */
	int instype;				/* type of instruction (see above) */
	int specialnum;				/* type of special instruction */
	void (*opfn)(asmstate_t *as, sourceline_t *cl, char **optr);
} instab_t;

#ifndef __instab_c_seen__
extern instab_t instab[];
#endif //__instab_c_seen__

#endif //__instab_h_seen__