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view src/instab.c @ 12:9ef54d49febc 1.0
Bumped version number
| author | lost |
|---|---|
| date | Sun, 04 Jan 2009 05:45:30 +0000 |
| parents | c4b2f96eaea6 |
| children |
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/* instab.c Copyright © 2008 William Astle This file is part of LWASM. LWASM is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see <http://www.gnu.org/licenses/>. Contains the instruction table for assembling code */ #include <stdlib.h> #define __instab_c_seen__ #include "instab.h" extern void insn_gen(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_inh(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_indexed(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_rtor(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_rlist(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_logicmem(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_bitbit(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_tfm(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_rel8(asmstate_t *as, sourceline_t *cl, char **optr); extern void insn_rel16(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_org(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_equ(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_setdp(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_fcb(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_fdb(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_fqb(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_fcc(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_fcs(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_fcn(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_rmb(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_rmd(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_rmq(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_zmb(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_zmd(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_zmq(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_align(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_end(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_include(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_macro(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_endm(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_cond(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_else(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_endc(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_ifne(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_ifeq(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_ifge(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_ifgt(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_ifle(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_iflt(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_error(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_set(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_pragma(asmstate_t *as, sourceline_t *cl, char **optr); extern void pseudo_starpragma(asmstate_t *as, sourceline_t *cl, char **optr); instab_t instab[] = { { "abx", { 0x3a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "adca", { 0x99, 0xa9, 0xb9, 0x89 }, INSTYPE_GEN8, 0, insn_gen }, { "adcb", { 0xd9, 0xe9, 0xf9, 0xc9 }, INSTYPE_GEN8, 0, insn_gen }, { "adcd", { 0x1099, 0x10a9, 0x10b9, 0x1089 }, INSTYPE_GEN, 0, insn_gen }, { "adcr", { 0x1031, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "adda", { 0x9b, 0xab, 0xbb, 0x8b }, INSTYPE_GEN8, 0, insn_gen }, { "addb", { 0xdb, 0xeb, 0xfb, 0xcb }, INSTYPE_GEN8, 0, insn_gen }, { "addd", { 0xd3, 0xe3, 0xf3, 0xc3 }, INSTYPE_GEN, 0, insn_gen }, { "adde", { 0x119b, 0x11ab, 0x11bb, 0x118b }, INSTYPE_GEN8, 0, insn_gen }, { "addf", { 0x11db, 0x11eb, 0x11fb, 0x11cb }, INSTYPE_GEN8, 0, insn_gen }, { "addr", { 0x1030, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "addw", { 0x109b, 0x10ab, 0x10bb, 0x108b }, INSTYPE_GEN, 0, insn_gen }, { "aim", { 0x02, 0x62, 0x72, -0x1 }, INSTYPE_LOGICMEM, 0, insn_logicmem }, { "anda", { 0x94, 0xa4, 0xb4, 0x84 }, INSTYPE_GEN8, 0, insn_gen }, { "andb", { 0xd4, 0xe4, 0xf4, 0xc4 }, INSTYPE_GEN8, 0, insn_gen }, { "andcc", { 0x1c, -0x1, -0x1, 0x1c }, INSTYPE_IMM8, 0, insn_gen }, { "andd", { 0x1094, 0x10a4, 0x10b4, 0x1084 }, INSTYPE_GEN, 0, insn_gen }, { "andr", { 0x1034, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "asl", { 0x08, 0x68, 0x78, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "asla", { 0x48, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "aslb", { 0x58, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "asld", { 0x1048, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "asr", { 0x07, 0x67, 0x77, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "asra", { 0x47, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "asrb", { 0x57, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "asrd", { 0x1047, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "band", { 0x1130, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "bcc", { 0x24, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bcs", { 0x25, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "beor", { 0x1134, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "beq", { 0x27, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bge", { 0x2c, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bgt", { 0x2e, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bhi", { 0x22, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bhs", { 0x24, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "biand", { 0x1131, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "bieor", { 0x1135, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "bior", { 0x1133, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "bita", { 0x95, 0xa5, 0xb5, 0x85 }, INSTYPE_GEN8, 0, insn_gen }, { "bitb", { 0xd5, 0xe5, 0xf5, 0xc5 }, INSTYPE_GEN8, 0, insn_gen }, { "bitd", { 0x1095, 0x10a5, 0x10b5, 0x1085 }, INSTYPE_GEN, 0, insn_gen }, { "bitmd", { 0x113c, -0x1, -0x1, 0x113c }, INSTYPE_IMM8, 0, insn_gen }, { "ble", { 0x2f, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "blo", { 0x25, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bls", { 0x23, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "blt", { 0x2d, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bmi", { 0x2b, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bne", { 0x26, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bor", { 0x1132, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "bpl", { 0x2a, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bra", { 0x20, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "brn", { 0x21, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bsr", { 0x8d, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bvc", { 0x28, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "bvs", { 0x29, -0x1, -0x1, -0x1 }, INSTYPE_REL8, 0, insn_rel8 }, { "clr", { 0x0f, 0x6f, 0x7f, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "clra", { 0x4f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "clrb", { 0x5f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "clrd", { 0x104f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "clre", { 0x114f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "clrf", { 0x115f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "clrw", { 0x105f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "cmpa", { 0x91, 0xa1, 0xb1, 0x81 }, INSTYPE_GEN8, 0, insn_gen }, { "cmpb", { 0xd1, 0xe1, 0xf1, 0xc1 }, INSTYPE_GEN8, 0, insn_gen }, { "cmpd", { 0x1093, 0x10a3, 0x10b3, 0x1083 }, INSTYPE_GEN, 0, insn_gen }, { "cmpe", { 0x1191, 0x11a1, 0x11b1, 0x1181 }, INSTYPE_GEN8, 0, insn_gen }, { "cmpf", { 0x11d1, 0x11e1, 0x11f1, 0x11c1 }, INSTYPE_GEN8, 0, insn_gen }, { "cmpr", { 0x1037, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "cmps", { 0x119c, 0x11ac, 0x11bc, 0x118c }, INSTYPE_GEN, 0, insn_gen }, { "cmpu", { 0x1193, 0x11a3, 0x11b3, 0x1183 }, INSTYPE_GEN, 0, insn_gen }, { "cmpw", { 0x1091, 0x10a1, 0x10b1, 0x1081 }, INSTYPE_GEN, 0, insn_gen }, { "cmpx", { 0x9c, 0xac, 0xbc, 0x8c }, INSTYPE_GEN, 0, insn_gen }, { "cmpy", { 0x109c, 0x10ac, 0x10bc, 0x108c }, INSTYPE_GEN, 0, insn_gen }, { "com", { 0x03, 0x63, 0x73, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "coma", { 0x43, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "comb", { 0x53, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "comd", { 0x1043, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "come", { 0x1143, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "comf", { 0x1153, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "comw", { 0x1053, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "cwai", { 0x3c, -0x1, -0x1, -0x1 }, INSTYPE_IMM8, 0, insn_gen }, { "daa", { 0x19, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "dec", { 0x0a, 0x6a, 0x7a, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "deca", { 0x4a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "decb", { 0x5a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "decd", { 0x104a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "dece", { 0x114a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "decf", { 0x115a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "decw", { 0x105a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "divd", { 0x118d, 0x119d, 0x11ad, 0x11bd }, INSTYPE_GEN8, 0, insn_gen }, { "divq", { 0x118e, 0x119e, 0x11ae, 0x11be }, INSTYPE_GEN, 0, insn_gen }, { "eim", { 0x05, 0x65, 0x75, -0x1 }, INSTYPE_LOGICMEM, 0, insn_logicmem }, { "eora", { 0x98, 0xa8, 0xb8, 0x88 }, INSTYPE_GEN8, 0, insn_gen }, { "eorb", { 0xd8, 0xe9, 0xf9, 0xc8 }, INSTYPE_GEN8, 0, insn_gen }, { "eord", { 0x1098, 0x10a8, 0x10b8, 0x1088 }, INSTYPE_GEN, 0, insn_gen }, { "eorr", { 0x1036, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "exg", { 0x1e, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "inc", { 0x0c, 0x6c, 0x7c, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "inca", { 0x4c, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "incb", { 0x5c, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "incd", { 0x104c, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "ince", { 0x114c, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "incf", { 0x115c, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "incw", { 0x105c, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "jmp", { 0x0e, 0x6e, 0x7e, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "jsr", { 0x9d, 0xad, 0xbd, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "lbcc", { 0x1024, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbcs", { 0x1025, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbeq", { 0x1027, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbge", { 0x102c, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbgt", { 0x102e, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbhi", { 0x1022, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbhs", { 0x1024, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lble", { 0x102f, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lblo", { 0x1025, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbls", { 0x1023, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lblt", { 0x102d, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbmi", { 0x102b, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbne", { 0x1026, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbpl", { 0x102a, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbra", { 0x16, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbrn", { 0x1021, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbsr", { 0x17, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbvc", { 0x1028, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lbvs", { 0x1029, -0x1, -0x1, -0x1 }, INSTYPE_REL16, 0, insn_rel16 }, { "lda", { 0x96, 0xa6, 0xb6, 0x86 }, INSTYPE_GEN8, 0, insn_gen }, { "ldb", { 0xd6, 0xe6, 0xf6, 0xc6 }, INSTYPE_GEN8, 0, insn_gen }, { "ldbt", { 0x1136, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "ldd", { 0xdc, 0xec, 0xfc, 0xcc }, INSTYPE_GEN, 0, insn_gen }, { "lde", { 0x1196, 0x11a6, 0x11b6, 0x1186 }, INSTYPE_GEN8, 0, insn_gen }, { "ldf", { 0x11d6, 0x11e6, 0x11f6, 0x11c6 }, INSTYPE_GEN8, 0, insn_gen }, { "ldq", { 0x10dc, 0x10ec, 0x10fc, 0xcd }, INSTYPE_GEN32, 0, insn_gen }, { "lds", { 0x10de, 0x10ee, 0x10fe, 0x10ce }, INSTYPE_GEN, 0, insn_gen }, { "ldu", { 0xde, 0xee, 0xfe, 0xce }, INSTYPE_GEN, 0, insn_gen }, { "ldw", { 0x1096, 0x10a6, 0x10b6, 0x1086 }, INSTYPE_GEN, 0, insn_gen }, { "ldx", { 0x9e, 0xae, 0xbe, 0x8e }, INSTYPE_GEN, 0, insn_gen }, { "ldy", { 0x109e, 0x10ae, 0x10be, 0x108e }, INSTYPE_GEN, 0, insn_gen }, { "ldmd", { 0x113d, -0x1, -0x1, 0x113d }, INSTYPE_IMM8, 0, insn_gen }, { "leas", { 0x32, -0x1, -0x1, -0x1 }, INSTYPE_INDEX, 0, insn_indexed }, { "leau", { 0x33, -0x1, -0x1, -0x1 }, INSTYPE_INDEX, 0, insn_indexed }, { "leax", { 0x30, -0x1, -0x1, -0x1 }, INSTYPE_INDEX, 0, insn_indexed }, { "leay", { 0x31, -0x1, -0x1, -0x1 }, INSTYPE_INDEX, 0, insn_indexed }, { "lsl", { 0x08, 0x68, 0x78, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "lsla", { 0x48, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "lslb", { 0x58, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "lsld", { 0x1048, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "lsr", { 0x04, 0x64, 0x74, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "lsra", { 0x44, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "lsrb", { 0x54, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "lsrd", { 0x1044, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "lsrw", { 0x1054, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "mul", { 0x3d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "muld", { 0x118f, 0x119f, 0x11af, 0x11bf }, INSTYPE_GEN, 0, insn_gen }, { "neg", { 0x00, 0x60, 0x70, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "nega", { 0x40, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "negb", { 0x50, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "negd", { 0x1040, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "nop", { 0x12, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "oim", { 0x01, 0x61, 0x71, -0x1 }, INSTYPE_LOGICMEM, 0, insn_logicmem }, { "ora", { 0x9a, 0xaa, 0xba, 0x8a }, INSTYPE_GEN8, 0, insn_gen }, { "orb", { 0xda, 0xea, 0xfa, 0xca }, INSTYPE_GEN8, 0, insn_gen }, { "orcc", { 0x1a, -0x1, -0x1, 0x1a }, INSTYPE_IMM8, 0, insn_gen }, { "ord", { 0x109a, 0x10aa, 0x10ba, 0x108a }, INSTYPE_GEN, 0, insn_gen }, { "orr", { 0x1035, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "pshs", { 0x34, -0x1, -0x1, -0x1 }, INSTYPE_RLIST, 0, insn_rlist }, { "pshsw", { 0x1038, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "pshu", { 0x36, -0x1, -0x1, -0x1 }, INSTYPE_RLIST, 0, insn_rlist }, { "pshuw", { 0x103a, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "puls", { 0x35, -0x1, -0x1, -0x1 }, INSTYPE_RLIST, 0, insn_rlist }, { "pulsw", { 0x1039, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "pulu", { 0x37, -0x1, -0x1, -0x1 }, INSTYPE_RLIST, 0, insn_rlist }, { "puluw", { 0x103b, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rol", { 0x09, 0x69, 0x79, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "rola", { 0x49, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rolb", { 0x59, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rold", { 0x1049, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rolw", { 0x1059, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "ror", { 0x06, 0x66, 0x76, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "rora", { 0x46, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rorb", { 0x56, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rord", { 0x1046, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rorw", { 0x1056, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rti", { 0x3b, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "rts", { 0x39, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "sbca", { 0x92, 0xa2, 0xb2, 0x82 }, INSTYPE_GEN8, 0, insn_gen }, { "sbcb", { 0xd2, 0xe2, 0xf2, 0xc2 }, INSTYPE_GEN8, 0, insn_gen }, { "sbcd", { 0x1092, 0x10a2, 0x10b2, 0x1082 }, INSTYPE_GEN, 0, insn_gen }, { "sbcr", { 0x1033, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "sex", { 0x1d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "sexw", { 0x14, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "sta", { 0x97, 0xa7, 0xb7, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stb", { 0xd7, 0xe7, 0xf7, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stbt", { 0x1137, -0x1, -0x1, -0x1 }, INSTYPE_BITBIT, 0, insn_bitbit }, { "std", { 0xdd, 0xed, 0xfd, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "ste", { 0x1197, 0x11a7, 0x11b7, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stf", { 0x11d7, 0x11e7, 0x11f7, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stq", { 0x10dd, 0x10ed, 0x10fd, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "sts", { 0x10df, 0x10ef, 0x10ff, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stu", { 0xdf, 0xef, 0xff, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stw", { 0x1097, 0x10a7, 0x10b7, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "stx", { 0x9f, 0xaf, 0xbf, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "sty", { 0x109f, 0x10af, 0x10bf, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "suba", { 0x90, 0xa0, 0xb0, 0x80 }, INSTYPE_GEN8, 0, insn_gen }, { "subb", { 0xd0, 0xe0, 0xf0, 0xc0 }, INSTYPE_GEN8, 0, insn_gen }, { "subd", { 0x93, 0xa3, 0xb3, 0x83 }, INSTYPE_GEN, 0, insn_gen }, { "sube", { 0x1190, 0x11a0, 0x11b0, 0x1180 }, INSTYPE_GEN8, 0, insn_gen }, { "subf", { 0x11d0, 0x11e0, 0x11f0, 0x11c0 }, INSTYPE_GEN8, 0, insn_gen }, { "subr", { 0x1032, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "subw", { 0x1090, 0x10a0, 0x1090, 0x1080 }, INSTYPE_GEN8, 0, insn_gen }, { "swi", { 0x3f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "swi2", { 0x103f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "swi3", { 0x113f, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "sync", { 0x13, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, // note: r+,r+ r-,r- r+,r r,r+ { "tfm", { 0x1138, 0x1139, 0x113a, 0x113b }, INSTYPE_TFM, 0, insn_tfm }, { "tfr", { 0x1f, -0x1, -0x1, -0x1 }, INSTYPE_RTOR, 0, insn_rtor }, { "tim", { 0x0b, 0x6b, 0x7b, -0x1 }, INSTYPE_LOGICMEM, 0, insn_logicmem }, { "tst", { 0x0d, 0x6d, 0x7d, -0x1 }, INSTYPE_GENNOIMM, 0, insn_gen }, { "tsta", { 0x4d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "tstb", { 0x5d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "tstd", { 0x104d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "tste", { 0x114d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "tstf", { 0x115d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, { "tstw", { 0x105d, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh }, // pseudo ops are here { "org", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_ORG, pseudo_org }, { "equ", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_EQU, pseudo_equ }, { "=", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_EQU, pseudo_equ }, { "setdp", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_SETDP, pseudo_setdp }, { "fcb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_FCB, pseudo_fcb }, { "fdb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_FDB, pseudo_fdb }, { "fqb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_FQB, pseudo_fqb }, { "fcc", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_FCC, pseudo_fcc }, { "fcs", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_FCS, pseudo_fcs }, { "fcn", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_FCN, pseudo_fcn }, { "rmb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_RMB, pseudo_rmb }, { "align", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_ALIGN, pseudo_align }, { "end", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_END, pseudo_end }, { "include",{ -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_INCLUDE, pseudo_include }, // { "absolute", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "bsz", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "byte", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_fcb }, // { "cond", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_cond }, // { "db", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_fcb }, // { "ds", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_rmb }, // { "dtb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "dts", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "dw", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_fdb }, // { "dword", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_fqb }, { "else", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_ELSE, pseudo_else }, // { "emod", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, { "endc", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_ENDC, pseudo_endc }, { "endif", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_ENDC, pseudo_endc }, // { "even", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "fcr", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "fill", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "fzb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "fzd", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "fzq", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, { "if", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_ifne }, { "ifeq", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_ifeq }, { "ifge", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_ifge }, { "ifgt", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_ifgt }, { "ifle", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_ifle }, { "iflt", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_iflt }, { "ifne", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_COND, pseudo_ifne }, // { "ifp1", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "ifp2", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "lib", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "mod", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "nam", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "name", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "nam", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "odd", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "opt", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "pag", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "page", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "page0", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "page1", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, { "rmd", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_rmd }, { "rmq", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_rmq }, // { "set", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "spc", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "title", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "ttl", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "use", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "word", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_fdb }, { "zmb", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_zmb }, { "zmd", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_zmd }, { "zmq", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_zmq }, { "macro", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_MACRO, pseudo_macro }, { "endm", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, SPECIAL_ENDM, pseudo_endm }, // { "struct", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "endstruct", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, NULL }, // { "namespace", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_namespace }, // { "endnamespace", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_endnamespace }, // { "endname", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_endnamespace }, { "error", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_error }, { "set", { -1, -1, -1, -1 }, INSTYPE_PSEUDO, 0, pseudo_set }, { "pragma", { -1, -1, -1, -1}, INSTYPE_PSEUDO, 0, pseudo_pragma }, { "*pragma", { -1, -1, -1, -1}, INSTYPE_PSEUDO, 0, pseudo_starpragma }, /* flag end of table */ { NULL, { -0x1, -0x1, -0x1, -0x1 }, INSTYPE_INH, 0, insn_inh } };