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Fix cycle counting for relative branches. The original creator of the cycle counting code appears to have mangled two different approaches to counting the cycles for relative branches into the final product which led to counting too many cycles for the branch instructions. The comments in the cycle table were correct but the code was doing some incorrect things. Also add the missing LBRN entry to the cycle table. The one labelled LBRN was not, in fact, LBRN, but one of the actual useful branch instructions.
author William Astle <lost@l-w.ca>
date Thu, 03 Mar 2016 21:38:21 -0700
parents 2c24602be78f
children
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1 LWASM 2.0
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2 =========
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4 LWASM is a cross-assembler for the MC6809 and HD6309 CPUs. It should
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5 assemble most reasonable EDTASM compatible source code. This document is not
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6 intended to teach assembly language for these CPUs but rather to document
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7 the behaviour of LWASM.
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10 TARGETS
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11 -------
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13 LWASM supports several targets for assembly. These are decb, raw, and obj.
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15 The raw target generates a raw binary output. This is useful for building
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16 ROMs and other items that are not intended to be loaded by any kind of
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17 loader. In this mode, the ORG directive is merely advisory and does not
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18 affect the output except for the addresses symbols are defined to have.
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20 The decb target generates output that can be loaded with the CLOADM or LOADM
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21 commands in Color Basic. There will be approximately one segment in the
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22 output file for every ORG statement after which any code is emitted. (That
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23 is, two ORG statements in a row will not generate two output segments.)
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24 This is approximately equivalent to running A/AO in EDTASM.
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26 The obj target generates output that is intended to be linked later with
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27 LWLINK. This target disallows the use of ORG for defining anything other
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28 than constants. In this target, source files consist of a number of sections
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29 (SECTION/ENDSECTION). Nothing outside of a section is permitted to cause any
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30 output at all. Use of an ORG statement within a section is an error. This
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31 target also permits tagging symbols for export (EXPORT) and marking a symbol
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32 as externally defined (IMPORT/EXTERN). The linker will resolve any external
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33 references at link time. Additionally, any inter-section references will be
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34 resolved by the linker. All code in each section is assembled with an
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35 implicit origin of 0. SETDP has no effect because the assembler has no idea
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36 what address the linker will assign to the code when it is linked. Any
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37 direct addressing modes will default to extended to allow for the linker to
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38 perform relocations. Intersegment references and external references will
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39 use 16 bit relative addressing but intrasegment internal references may use
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40 8 bit relative addressing. Forced 8 bit direct modes are probably an error
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41 but are permitted on the theory that the programmer might know something the
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42 assembler doesn't.
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