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Fix bug with section padding and downward allocation. When placing sections with the "high" method, padding was added to the section instance at the lowest address insted of the highest as is appropriate for the padafter option. Explicitly handle the padding for the first instance encountered (highest address) when growing down.
author William Astle <lost@l-w.ca>
date Fri, 21 Mar 2014 23:49:23 -0600
parents b30091890d62
children
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>2.5. Intel Hex</A
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>This ASCII format consists of a series of CR+LF terminated "records" of ASCII
text. Each record has the following structure: a start-of-record character
":", a two-digit ASCII hex byte count, a four-digit ASCII hex address, a two-
digit ASCII hex record type, an optional sequence of two-digit ASCII hex data 
values, and a two-digit ASCII hex checksum. The LW tool chain issues only 00, 
and 01 Intel Hex record types. Data records are limited to maximum of 16 
data bytes in length, and paragraph alignment of addresses is favored. The 
address sequence of the Intel hex records directly follows that of the source 
file; multiple ORG directives in the source code may result in out-of-sequence 
addresses in the Intel Hex output. </P
><P
>Intel Hex format is the other standard ASCII format accepted by most memory 
device programming equipment, it and the Motorola S-Record format are used for
similar purposes.</P
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>LWASM can output this format since version 4.10.</P
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