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Fix code generation error in gcc6809 It turned out that under some circumstances, the gcc optimizer would select an instruction sequence that had the sense of a branch inverted. It seems this was due to a particular instruction pattern included in the machine description not being quite right with respect to how the condition codes were tracked. Removing that instruction pattern seems to fix things (subtraction with the arguments reversed). gcc seems to be smart enough to figure out how to reorganize code to work without this reversed sense subtraction and then do the right thing.
author William Astle <lost@l-w.ca>
date Thu, 24 Mar 2016 20:07:20 -0600
parents fc166b3bbae3
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>3.11. Convenience Instructions</A
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>&#13;Similar to the 6800 compatibility instructions (pragma 6800compat) these
pragma 6809conv and pragma 6309conv enable convenience extensions to the
6809 and 6309 instruction set.  Originally intended for compatibility with
the MACRO-80c assembler, these have proven useful in large codebases that
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>&#13;The 6809 extensions are straightforward with the exception of "TSTD" which
assembles as "STD -2,S".  A benefit of using these is they will "just work"
and take on their 6309 equivalent when you enable 6309 assembly mode. 
Supported instructions: ASRD, CLRD,   COMD,   LSLD,   LSRD,   NEGD,   TSTD.</P
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>&#13;6309 extensions are based on common patterns described by Chris Burke and
Darren Atkinson in their 6309 documentation and include the following
instructions: ASRQ,   CLRQ,   COMQ,   LSLE,   LSLF,   LSLQ,   LSRQ,   NEGE,
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